Searched refs:Bgt (Results 1 – 5 of 5) sorted by relevance
| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64_test.cc | 544 __ Bgt(rs, rt, label, is_bare); in EmitBcondForAllConditions() local
8348 TEST_F(AssemblerRISCV64Test, Bgt) { in TEST_F() argument
8351 &Riscv64Assembler::Bgt, /*imm_bits=*/-12, /*shift=*/1, "blt {reg2}, {reg1}, {imm}\n"), in TEST_F()
8824 __ Bgt(reg, reg, &label); in TEST_F() local
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| D | assembler_riscv64.h | 1753 void Bgt(XRegister rs, XRegister rt, int32_t offset);
1815 void Bgt(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare = false);
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| D | assembler_riscv64.cc | 6243 void Riscv64Assembler::Bgt(XRegister rs, XRegister rt, int32_t offset) { in Bgt() function in art::riscv64::Riscv64Assembler
6465 Bgt(rs, Zero, label, is_bare); in Bgtz()
6488 void Riscv64Assembler::Bgt(XRegister rs, XRegister rt, Riscv64Label* label, bool is_bare) { in Bgt() function in art::riscv64::Riscv64Assembler
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| /art/compiler/optimizing/ |
| D | intrinsics_riscv64.cc | 1201 __ Bgt(temp, Zero, &loop); in VisitStringEquals() local
1660 __ Bgt(dest_pos.AsRegister<XRegister>(), temp1, intrinsic_slow_path->GetEntryLabel()); in VisitSystemArrayCopy() local
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| D | code_generator_riscv64.cc | 1731 __ Bgt(left, right_reg, label); in GenerateIntLongCompareAndBranch() local
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