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Searched refs:BranchCondition (Results 1 – 2 of 2) sorted by relevance

/art/compiler/utils/riscv64/
Dassembler_riscv64.h1927 enum BranchCondition : uint8_t { enum
2013 BranchCondition condition,
2024 static bool IsNop(BranchCondition condition, XRegister lhs, XRegister rhs);
2025 static bool IsUncond(BranchCondition condition, XRegister lhs, XRegister rhs);
2028 static BranchCondition OppositeCondition(BranchCondition cond);
2032 BranchCondition GetCondition() const;
2101 BranchCondition condition_; // Condition for conditional branches.
2116 void EmitBcond(BranchCondition cond, XRegister rs, XRegister rt, int32_t offset);
2125 BranchCondition condition,
Dassembler_riscv64.cc6696 bool Riscv64Assembler::Branch::IsNop(BranchCondition condition, XRegister lhs, XRegister rhs) { in IsNop()
6709 bool Riscv64Assembler::Branch::IsUncond(BranchCondition condition, XRegister lhs, XRegister rhs) { in IsUncond()
6756 Riscv64Assembler::BranchCondition condition, in Branch()
6813 Riscv64Assembler::BranchCondition Riscv64Assembler::Branch::OppositeCondition( in OppositeCondition()
6814 Riscv64Assembler::BranchCondition cond) { in OppositeCondition()
6846 Riscv64Assembler::BranchCondition Riscv64Assembler::Branch::GetCondition() const { in GetCondition()
7045 void Riscv64Assembler::EmitBcond(BranchCondition cond, in EmitBcond()
7075 BranchCondition condition = branch->GetCondition(); in EmitBranch()
7227 Riscv64Label* label, bool is_bare, BranchCondition condition, XRegister lhs, XRegister rhs) { in Bcond()