Searched refs:Divuw (Results 1 – 4 of 4) sorted by relevance
| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64_test.cc | 2786 TEST_F(AssemblerRISCV64Test, Divuw) { in TEST_F() argument
2787 DriverStr(RepeatRRR(&Riscv64Assembler::Divuw, "divuw {reg1}, {reg2}, {reg3}"), "Divuw"); in TEST_F()
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| D | assembler_riscv64.h | 348 void Divuw(XRegister rd, XRegister rs1, XRegister rs2);
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| D | assembler_riscv64.cc | 713 void Riscv64Assembler::Divuw(XRegister rd, XRegister rs1, XRegister rs2) { in Divuw() function in art::riscv64::Riscv64Assembler
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| /art/compiler/optimizing/ |
| D | intrinsics_riscv64.cc | 616 __ Divuw(out, dividend, divisor); in GenerateDivRemUnsigned() local
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