Searched refs:FLoadw (Results 1 – 5 of 5) sorted by relevance
| /art/compiler/utils/riscv64/ |
| D | jni_macro_assembler_riscv64.cc | 229 __ FLoadw(dest.AsFRegister(), base.AsXRegister(), offs.Int32Value()); in Load() local
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| D | assembler_riscv64_test.cc | 1017 __ FLoadw(freg, narrow_literal); in TestLoadLiteral() local
9100 TEST_F(AssemblerRISCV64Test, FLoadw) { in TEST_F() argument
9102 TestFPLoadStoreArbitraryOffset("FLoadw", "flw", &Riscv64Assembler::FLoadw); in TEST_F()
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| D | assembler_riscv64.h | 1790 void FLoadw(FRegister rd, XRegister rs1, int32_t offset);
1828 void FLoadw(FRegister rd, Literal* literal);
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| D | assembler_riscv64.cc | 6355 void Riscv64Assembler::FLoadw(FRegister rd, XRegister rs1, int32_t offset) { in FLoadw() function in art::riscv64::Riscv64Assembler
6535 void Riscv64Assembler::FLoadw(FRegister rd, Literal* literal) { in FLoadw() function in art::riscv64::Riscv64Assembler
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| /art/compiler/optimizing/ |
| D | code_generator_riscv64.cc | 917 __ FLoadw(out.AsFpuRegister<FRegister>(), rs1, offset); in Load() local
6145 __ FLoadw(destination.AsFpuRegister<FRegister>(), SP, source.GetStackIndex()); in MoveLocation() local
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