Searched refs:FT0 (Results 1 – 6 of 6) sorted by relevance
99 Riscv64ManagedRegister reg = Riscv64ManagedRegister::FromFRegister(FT0); in TEST()103 EXPECT_EQ(FT0, reg.AsFRegister()); in TEST()104 EXPECT_TRUE(reg.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()155 EXPECT_FALSE(no_reg.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()163 EXPECT_FALSE(reg_Zero.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()172 EXPECT_FALSE(reg_A1.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()181 EXPECT_FALSE(reg_S2.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()184 Riscv64ManagedRegister reg_F0 = Riscv64ManagedRegister::FromFRegister(FT0); in TEST()189 EXPECT_TRUE(reg_F0.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()198 EXPECT_FALSE(reg_F31.Equals(Riscv64ManagedRegister::FromFRegister(FT0))); in TEST()
262 FT0, in GetFPRegisters()
49 if (rhs >= FT0 && rhs < kNumberOfFRegisters) { in operator <<()
78 FT0 = 0, // F0, temporary 0 enumerator
101 fprs_[FT0] = nullptr; in SmashCallerSaves()
72 (1 << art::riscv64::FT0) | (1 << art::riscv64::FT1) | (1 << art::riscv64::FT2) |