Searched refs:Jal (Results 1 – 4 of 4) sorted by relevance
/art/compiler/utils/riscv64/ |
D | assembler_riscv64_test.cc | 710 __ Jal(reg, &label, is_bare); in TestJalRdForward() local 731 __ Jal(reg, &label, is_bare); in TestJalRdBackward() local 742 return [=](Riscv64Label* label) { __ Jal(label); }; in GetEmitJal() local 2307 TEST_F(AssemblerRISCV64Test, Jal) { in TEST_F() argument 2308 DriverStr(RepeatRIbS(&Riscv64Assembler::Jal, /*imm_bits=*/-20, /*shift=*/1, "jal {reg}, {imm}\n"), in TEST_F() 2314 DriverStr(RepeatRIbS(&Riscv64Assembler::Jal, /*imm_bits=*/-19, /*shift=*/2, "jal {reg}, {imm}\n"), in TEST_F() 8389 RepeatIbS<int32_t>(&Riscv64Assembler::Jal, /*imm_bits=*/-20, /*shift=*/1, "jal {imm}\n"), in TEST_F() 8396 RepeatIbS<int32_t>(&Riscv64Assembler::Jal, /*imm_bits=*/-19, /*shift=*/2, "jal {imm}\n"), in TEST_F()
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D | assembler_riscv64.h | 262 void Jal(XRegister rd, int32_t offset); 1760 void Jal(int32_t offset); 1820 void Jal(XRegister rd, Riscv64Label* label, bool is_bare = false); 1822 void Jal(Riscv64Label* label, bool is_bare = false);
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D | assembler_riscv64.cc | 88 void Riscv64Assembler::Jal(XRegister rd, int32_t offset) { in Jal() function in art::riscv64::Riscv64Assembler 6259 void Riscv64Assembler::J(int32_t offset) { Jal(Zero, offset); } in J() 6261 void Riscv64Assembler::Jal(int32_t offset) { Jal(RA, offset); } in Jal() function in art::riscv64::Riscv64Assembler 6508 void Riscv64Assembler::Jal(XRegister rd, Riscv64Label* label, bool is_bare) { in Jal() function in art::riscv64::Riscv64Assembler 6513 Jal(Zero, label, is_bare); in J() 6516 void Riscv64Assembler::Jal(Riscv64Label* label, bool is_bare) { in Jal() function in art::riscv64::Riscv64Assembler 6517 Jal(RA, label, is_bare); in Jal() 7124 Jal(lhs, offset); in EmitBranch()
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/art/compiler/optimizing/ |
D | code_generator_riscv64.cc | 6889 __ Jal(&frame_entry_label_); in GenerateStaticOrDirectCall() local
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