| D | assembler_riscv64.cc | 100 void Riscv64Assembler::Jalr(XRegister rd, XRegister rs1, int32_t offset) { in Jalr() function in art::riscv64::Riscv64Assembler
6263 void Riscv64Assembler::Jr(XRegister rs) { Jalr(Zero, rs, 0); } in Jr()
6265 void Riscv64Assembler::Jalr(XRegister rs) { Jalr(RA, rs, 0); } in Jalr() function in art::riscv64::Riscv64Assembler
6267 void Riscv64Assembler::Jalr(XRegister rd, XRegister rs) { Jalr(rd, rs, 0); } in Jalr() function in art::riscv64::Riscv64Assembler
6269 void Riscv64Assembler::Ret() { Jalr(Zero, RA, 0); } in Ret()
7154 emit_auipc_and_next(TMP, [&](int32_t short_offset) { Jalr(Zero, TMP, short_offset); }); in EmitBranch()
7158 emit_auipc_and_next(lhs, [&](int32_t short_offset) { Jalr(lhs, lhs, short_offset); }); in EmitBranch()
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