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Searched refs:LoadConst32 (Results 1 – 5 of 5) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_riscv64.cc280 __ LoadConst32(counter, ProfilingInfo::GetOptimizeThreshold()); in EmitNativeCode() local
432 __ LoadConst32(calling_convention.GetRegisterAt(0), type_index.index_); in EmitNativeCode() local
485 __ LoadConst32(calling_convention.GetRegisterAt(0), in EmitNativeCode() local
770 __ LoadConst32(calling_convention.GetRegisterAt(0), string_index.index_); in EmitNativeCode() local
3940 __ LoadConst32(out, 1); in VisitInstanceOf() local
3961 __ LoadConst32(out, 1); in VisitInstanceOf() local
3979 __ LoadConst32(out, 1); in VisitInstanceOf() local
4003 __ LoadConst32(out, 1); in VisitInstanceOf() local
4045 __ LoadConst32(out, 1); in VisitInstanceOf() local
4561 __ LoadConst32(calling_convention.GetRegisterAt(0), instruction->GetStringIndex().index_); in VisitLoadString() local
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Dintrinsics_riscv64.cc5021 __ LoadConst32(out, 0x3f000000); in GenMathRound() local
/art/compiler/utils/riscv64/
Dassembler_riscv64_test.cc8486 TEST_F(AssemblerRISCV64Test, LoadConst32) { in TEST_F() argument
8492 …DriverStr(RepeatRIb(&Riscv64Assembler::LoadConst32, /*imm_bits=*/-32, "li {reg}, {imm}"), "LoadCon… in TEST_F()
Dassembler_riscv64.cc6371 void Riscv64Assembler::LoadConst32(XRegister rd, int32_t value) { in LoadConst32() function in art::riscv64::Riscv64Assembler
6422 LoadConst32(tmp, value); in AddConst32()
7584 LoadConst32(tmp, offset); in AdjustBaseAndOffset()
Dassembler_riscv64.h1796 void LoadConst32(XRegister rd, int32_t value);