Searched refs:Mv (Results 1 – 6 of 6) sorted by relevance
| /art/compiler/utils/riscv64/ |
| D | jni_macro_assembler_riscv64.cc | 380 __ Mv(dest.AsXRegister(), src.AsXRegister()); in Move() local
403 __ Mv(dest.AsRiscv64().AsXRegister(), TR); in GetCurrentThread() local
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| D | assembler_riscv64_test.cc | 8134 TEST_F(AssemblerRISCV64Test, Mv) { in TEST_F() argument
8136 DriverStr(RepeatRR(&Riscv64Assembler::Mv, "addi {reg1}, {reg2}, 0"), "Mv"); in TEST_F()
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| D | assembler_riscv64.h | 1725 void Mv(XRegister rd, XRegister rs);
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| D | assembler_riscv64.cc | 6119 void Riscv64Assembler::Mv(XRegister rd, XRegister rs) { Addi(rd, rs, 0); } in Mv() function in art::riscv64::Riscv64Assembler
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| /art/compiler/optimizing/ |
| D | code_generator_riscv64.cc | 936 __ Mv(tmp, value.AsRegister<XRegister>()); in Store() local
989 __ Mv(swap_src, value.AsRegister<XRegister>()); in StoreSeqCst() local
1219 __ Mv(maybe_temp.AsRegister<XRegister>(), out_reg); in GenerateReferenceLoadOneRegister() local
1441 __ Mv(out, Zero); in DivRemOneOrMinusOne() local
1451 __ Mv(out, dividend); in DivRemOneOrMinusOne() local
2374 __ Mv(rd, rs1); in HandleShift() local
3907 __ Mv(out, Zero); in VisitInstanceOf() local
4175 __ Mv(hidden_reg.AsRegister<XRegister>(), temp); in VisitInvokeInterface() local
6180 __ Mv(destination.AsRegister<XRegister>(), source.AsRegister<XRegister>()); in MoveLocation() local
7013 __ Mv(trg_reg, res_reg); in MoveFromReturnRegister() local
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| D | intrinsics_riscv64.cc | 1377 __ Mv(old_value_temp_, old_value_); in EmitNativeCode() local
1420 __ Mv(old_value_, expected_); in EmitNativeCode() local
1440 __ Mv(old_value_, old_value_temp_); in EmitNativeCode() local
1454 __ Mv(old_value_, old_value_temp_); in EmitNativeCode() local
4416 __ Mv(new_value, out.AsRegister<XRegister>()); in GenerateVarHandleGetAndUpdate() local
5184 __ Mv(number_of_chars, tmp); in VisitStringGetCharsNoCheck() local
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