Searched refs:Orn (Results 1 – 7 of 7) sorted by relevance
| /art/compiler/utils/arm/ |
| D | assembler_arm_vixl.h | 116 WITH_FLAGS_DONT_CARE_RD_RN_OP(Orn);
|
| /art/compiler/optimizing/ |
| D | code_generator_arm_vixl.cc | 8776 __ Orn(out_reg, first_reg, second_reg); in VisitBitwiseNegatedRight() local
8801 __ Orn(out_low, first_low, second_low); in VisitBitwiseNegatedRight() local
8802 __ Orn(out_high, first_high, second_high); in VisitBitwiseNegatedRight() local
8933 __ Orn(out, first, ~value); in GenerateOrrConst() local
|
| D | code_generator_arm64.cc | 2522 __ Orn(dst, lhs, rhs); in VisitBitwiseNegatedRight() local
|
| D | code_generator_riscv64.cc | 5464 __ Orn(dst, lhs, rhs); in VisitBitwiseNegatedRight() local
|
| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64_test.cc | 3807 TEST_F(AssemblerRISCV64Test, Orn) { in TEST_F() argument
3808 DriverStr(RepeatRRR(&Riscv64Assembler::Orn, "orn {reg1}, {reg2}, {reg3}"), "Orn"); in TEST_F()
|
| D | assembler_riscv64.h | 616 void Orn(XRegister rd, XRegister rs1, XRegister rs2);
|
| D | assembler_riscv64.cc | 1609 void Riscv64Assembler::Orn(XRegister rd, XRegister rs1, XRegister rs2) { in Orn() function in art::riscv64::Riscv64Assembler
|