Searched refs:ZextW (Results 1 – 5 of 5) sorted by relevance
| /art/compiler/utils/riscv64/ |
| D | assembler_riscv64_test.cc | 8231 TEST_F(AssemblerRISCV64Test, ZextW) { in TEST_F() argument
8232 DriverStr(RepeatRR(&Riscv64Assembler::ZextW, "zext.w {reg1}, {reg2}\n"), "ZextW"); in TEST_F()
8237 DriverStr(RepeatRR(&Riscv64Assembler::ZextW, "zext.w {reg1}, {reg2}\n"), "ZextW_WithoutZba"); in TEST_F()
8242 DriverStr(RepeatRR(&Riscv64Assembler::ZextW, "zext.w {reg1}, {reg2}\n"), "ZextW_WithoutC"); in TEST_F()
8247 DriverStr(RepeatRR(&Riscv64Assembler::ZextW, "zext.w {reg1}, {reg2}\n"), "ZextW_WithoutZbaAndC"); in TEST_F()
|
| D | assembler_riscv64.h | 1734 void ZextW(XRegister rd, XRegister rs);
|
| D | assembler_riscv64.cc | 6186 void Riscv64Assembler::ZextW(XRegister rd, XRegister rs) { in ZextW() function in art::riscv64::Riscv64Assembler
|
| /art/compiler/optimizing/ |
| D | intrinsics_riscv64.cc | 1088 __ ZextW(old_value, old_value); in EmitLoadReserved() local
2716 __ ZextW(out, out); in GenUnsafeGetAndUpdate() local
4476 __ ZextW(old_value, old_value); in GenerateVarHandleGetAndUpdate() local
|
| D | code_generator_riscv64.cc | 7026 __ ZextW(reg, reg); // Zero-extend the 32-bit ref. in PoisonHeapReference() local
7031 __ ZextW(reg, reg); // Zero-extend the 32-bit ref. in UnpoisonHeapReference() local
|