D | assembler_riscv64.cc | 852 void Riscv64Assembler::Csrrw(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrw() argument 854 EmitI(ToInt12(csr), rs1, 0x1, rd, 0x73); in Csrrw() 857 void Riscv64Assembler::Csrrs(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrs() argument 859 EmitI(ToInt12(csr), rs1, 0x2, rd, 0x73); in Csrrs() 862 void Riscv64Assembler::Csrrc(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrc() argument 864 EmitI(ToInt12(csr), rs1, 0x3, rd, 0x73); in Csrrc() 867 void Riscv64Assembler::Csrrwi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrwi() argument 869 EmitI(ToInt12(csr), uimm5, 0x5, rd, 0x73); in Csrrwi() 872 void Riscv64Assembler::Csrrsi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrsi() argument 874 EmitI(ToInt12(csr), uimm5, 0x6, rd, 0x73); in Csrrsi() [all …]
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