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/art/runtime/arch/arm/
Dmemcmp16_arm.S59 ldrh ip, [r1], #2
60 subs r0, r0, ip
78 ldrh ip, [r1], #2
80 subs r0, r0, ip
101 ldr ip, [r1]
110 eors r0, r0, ip
112 ldreq ip, [r1, #4]!
116 eorseq r0, r0, ip
118 ldreq ip, [r1, #4]!
122 eorseq r0, r0, ip
[all …]
Djni_entrypoints_arm.S101 ldr ip, [r0, #THREAD_TOP_QUICK_FRAME_OFFSET] // uintptr_t tagged_quick_frame
102 bic ip, #TAGGED_JNI_SP_MASK // ArtMethod** sp
103 ldr ip, [ip] // ArtMethod* method
104 ldr ip, [ip, #ART_METHOD_ACCESS_FLAGS_OFFSET] // uint32_t access_flags
105 tst ip, #(ACCESS_FLAGS_METHOD_IS_FAST_NATIVE | ACCESS_FLAGS_METHOD_IS_CRITICAL_NATIVE)
162 ldrd ip, lr, [r4, #FRAME_SIZE_SAVE_REFS_AND_ARGS]
164 strd ip, lr, [r4], #8
177 add ip, r4, #FRAME_SIZE_SAVE_REFS_AND_ARGS - 40
178 stmia ip, {r1-r3, r5-r8, r10-r11, lr} // LR: Save return address for tail call from JNI stub.
200 ldr ip, [r1, #ART_METHOD_ACCESS_FLAGS_OFFSET] // Load access flags.
[all …]
Dquick_entrypoints_arm.S85 .cfi_rel_offset ip, 48
654 ldr ip, [\rObj, #MIRROR_OBJECT_LOCK_WORD_OFFSET]
655 tst ip, #LOCK_WORD_READ_BARRIER_STATE_MASK_SHIFTED
658 add \rObj, \rObj, ip, lsr #32
677 push {r0-r3, ip, lr} @ 6 words for saved registers (used in art_quick_aput_obj)
683 .cfi_rel_offset ip, 16
703 POP_REG_NE ip, 16, \rDest
1447 ldr ip, [rSELF, #THREAD_TOP_QUICK_FRAME_OFFSET]
1448 add ip, ip, #-1 // Remove the GenericJNI tag. ADD/SUB writing directly to SP is UNPREDICTABLE.
1449 mov sp, ip
[all …]
Dasm_support_arm.S310 ldr ip, [rSELF, #THREAD_EXCEPTION_OFFSET] @ Get exception field.
311 cmp ip, #0
378 ands ip, \tmp2, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ Test the non-gc bits.
/art/runtime/interpreter/mterp/arm64ng/
Dother.S11 GET_INST_OPCODE ip // extract opcode from wINST
13 GOTO_OPCODE ip // jump to next instruction
21 GET_INST_OPCODE ip // extract opcode from wINST
22 GOTO_OPCODE ip // jump to next instruction
29 GET_INST_OPCODE ip // ip<- opcode from xINST
31 GOTO_OPCODE ip // execute next instruction
40 GET_INST_OPCODE ip // extract opcode from rINST
41 GOTO_OPCODE ip // jump to next instruction
54 GET_INST_OPCODE ip // extract opcode from wINST
56 GOTO_OPCODE ip // jump to next instruction
[all …]
Dfloating_point.S17 GET_INST_OPCODE ip // extract opcode from rINST
19 GOTO_OPCODE ip // jump to next instruction
34 GET_INST_OPCODE ip // extract opcode from rINST
36 GOTO_OPCODE ip // jump to next instruction
53 GET_INST_OPCODE ip // extract opcode from rINST
55 GOTO_OPCODE ip // jump to next instruction
68 GET_INST_OPCODE ip // extract opcode from rINST
70 GOTO_OPCODE ip // jump to next instruction
97 GET_INST_OPCODE ip // extract opcode from rINST
99 GOTO_OPCODE ip // jump to next instruction
[all …]
Darithmetic.S30 GET_INST_OPCODE ip // extract opcode from rINST
32 GOTO_OPCODE ip // jump to next instruction
61 GET_INST_OPCODE ip // extract opcode from rINST
63 GOTO_OPCODE ip // jump to next instruction
90 GET_INST_OPCODE ip // extract opcode from rINST
92 GOTO_OPCODE ip // jump to next instruction
125 GET_INST_OPCODE ip // extract opcode from rINST
127 GOTO_OPCODE ip // jump to next instruction
157 GET_INST_OPCODE ip // extract opcode from rINST
159 GOTO_OPCODE ip // jump to next instruction
[all …]
Dmain.S86 #define ip x16 macro
309 GET_INST_OPCODE ip // extract opcode from wINST
310 GOTO_OPCODE ip // jump to next instruction
397 add x14, ip, ip
411 add \fp, \refs, ip, lsl #2
421 cbz ip, 2f
447 GET_INST_OPCODE ip
448 GOTO_OPCODE ip
532 add x4, xNEW_FP, ip, uxtx #2
558 mov ip, #-4
[all …]
Darray.S93 GET_INST_OPCODE ip // extract opcode from rINST
94 GOTO_OPCODE ip // jump to next instruction
124 GET_INST_OPCODE ip // extract opcode from rINST
126 GOTO_OPCODE ip // jump to next instruction
139 GET_INST_OPCODE ip // extract opcode from rINST
140 GOTO_OPCODE ip // jump to next instruction
157 GET_INST_OPCODE ip // extract opcode from rINST
158 GOTO_OPCODE ip // jump to next instruction
178 GET_INST_OPCODE ip
179 GOTO_OPCODE ip
Dobject.S16 GET_INST_OPCODE ip
17 GOTO_OPCODE ip
92 GET_INST_OPCODE ip
93 GOTO_OPCODE ip
183 GET_INST_OPCODE ip
184 GOTO_OPCODE ip
223 GET_INST_OPCODE ip
224 GOTO_OPCODE ip
266 GET_INST_OPCODE ip
267 GOTO_OPCODE ip
[all …]
Dcontrol_flow.S16 GET_INST_OPCODE ip // extract opcode from wINST
17 GOTO_OPCODE ip // jump to next instruction
37 GET_INST_OPCODE ip // extract opcode from wINST
38 GOTO_OPCODE ip // jump to next instruction
165 ldr ip, [xREFS, #-8]
166 mov sp, ip
/art/runtime/interpreter/mterp/armng/
Dmain.S277 SETUP_SAVE_REFS_ONLY_FRAME ip
281 ldr ip, [rSELF, #THREAD_EXCEPTION_OFFSET] @ Get exception field.
282 cmp ip, #0
307 GET_INST_OPCODE ip // extract opcode from rINST
308 GOTO_OPCODE ip // jump to next instruction
342 ubfx ip, lr, #COMPACT_CODE_ITEM_INS_SIZE_SHIFT, #4
343 add \registers, \registers, ip
349 mov ip, \code_item
352 sub ip, ip, #4
356 ldrh lr, [ip, #-2]!
[all …]
Dother.S11 GET_INST_OPCODE ip @ extract opcode from rINST
13 GOTO_OPCODE ip @ jump to next instruction
21 GET_INST_OPCODE ip @ extract opcode from rINST
22 GOTO_OPCODE ip @ jump to next instruction
29 GET_INST_OPCODE ip @ ip<- opcode from rINST
31 GOTO_OPCODE ip @ execute next instruction
40 GET_INST_OPCODE ip @ extract opcode from rINST
41 GOTO_OPCODE ip @ jump to next instruction
55 GET_INST_OPCODE ip // extract opcode from rINST
57 GOTO_OPCODE ip // jump to next instruction
[all …]
Darithmetic.S32 GET_INST_OPCODE ip @ extract opcode from rINST
34 GOTO_OPCODE ip @ jump to next instruction
65 GET_INST_OPCODE ip @ extract opcode from rINST
67 GOTO_OPCODE ip @ jump to next instruction
95 GET_INST_OPCODE ip @ extract opcode from rINST
97 GOTO_OPCODE ip @ jump to next instruction
131 GET_INST_OPCODE ip @ extract opcode from rINST
133 GOTO_OPCODE ip @ jump to next instruction
163 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
166 CLEAR_SHADOW_PAIR rINST, lr, ip @ Zero out the shadow regs
[all …]
Darray.S21 CLEAR_SHADOW_PAIR r4, lr, ip @ Zero out the shadow regs
24 GET_INST_OPCODE ip @ extract opcode from rINST
26 GOTO_OPCODE ip @ jump to next instruction
32 GET_INST_OPCODE ip @ extract opcode from rINST
34 GOTO_OPCODE ip @ jump to next instruction
39 GET_INST_OPCODE ip @ extract opcode from rINST
42 GOTO_OPCODE ip @ jump to next instruction
85 GET_INST_OPCODE ip @ extract opcode from rINST
91 GET_INST_OPCODE ip @ extract opcode from rINST
97 GET_INST_OPCODE ip @ extract opcode from rINST
[all …]
Dobject.S17 GET_INST_OPCODE ip
18 GOTO_OPCODE ip
93 GET_INST_OPCODE ip
94 GOTO_OPCODE ip
175 CLEAR_SHADOW_PAIR r2, ip, lr
189 GET_INST_OPCODE ip
190 GOTO_OPCODE ip
213 add ip, r3, r0
214 ATOMIC_LOAD64 ip, r0, r1, r3, .L${opcode}_slow_path_atomic_load
216 CLEAR_SHADOW_PAIR r2, ip, lr
[all …]
Dcontrol_flow.S17 GET_INST_OPCODE ip // extract opcode from rINST
18 GOTO_OPCODE ip // jump to next instruction
37 GET_INST_OPCODE ip // extract opcode from rINST
38 GOTO_OPCODE ip // jump to next instruction
166 ldr ip, [rREFS, #-4]
167 mov sp, ip
Dfloating_point.S21 GET_INST_OPCODE ip @ extract opcode from rINST
23 GOTO_OPCODE ip @ jump to next instruction
42 GET_INST_OPCODE ip @ extract opcode from rINST
/art/disassembler/
Ddisassembler_arm.cc233 const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr); in Dump() local
236 next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip, end_address)); in Dump()
238 const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr); in Dump() local
239 next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip)); in Dump()
/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc3706 temps.Exclude(ip); in MaybeGenerateInlineCacheCheck()
3708 __ Ldr(ip, MemOperand(r4, InlineCache::ClassesOffset().Int32Value())); in MaybeGenerateInlineCacheCheck()
3710 __ Cmp(klass, ip); in MaybeGenerateInlineCacheCheck()
9145 temps.Exclude(ip); in GenerateGcRootFieldLoad()
9250 temps.Exclude(ip); in GenerateFieldLoadWithBakerReadBarrier()
9286 MaybeGenerateMarkingRegisterCheck(/* code= */ 21, /* temp_loc= */ LocationFrom(ip)); in GenerateFieldLoadWithBakerReadBarrier()
9347 temps.Exclude(ip); in GenerateArrayLoadWithBakerReadBarrier()
9373 MaybeGenerateMarkingRegisterCheck(/* code= */ 22, /* temp_loc= */ LocationFrom(ip)); in GenerateArrayLoadWithBakerReadBarrier()
10242 __ Ldr(ip, lock_word); in EmitGrayCheckAndFastPath()
10246 __ Tst(ip, Operand(LockWord::kReadBarrierStateMaskShifted)); in EmitGrayCheckAndFastPath()
[all …]
Dcode_generator_arm_vixl.h946 DCHECK(reg < vixl::aarch32::ip.GetCode() && reg != mr.GetCode()) << reg; in CheckValidReg()
Dintrinsics_arm_vixl.cc123 DCHECK(!src_curr_addr.Is(ip)); in EmitNativeCode()
124 DCHECK(!dst_curr_addr.Is(ip)); in EmitNativeCode()
125 DCHECK(!src_stop_addr.Is(ip)); in EmitNativeCode()
126 DCHECK(!tmp.Is(ip)); in EmitNativeCode()
/art/compiler/utils/arm/
Dassembler_arm_vixl.cc293 CHECK(!base.Is(ip)); in LoadFromOffset()
/art/tools/jvmti-agents/ti-fast/
Dtifast.cc360 jint* ip,