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Searched refs:kVRegSize (Results 1 – 12 of 12) sorted by relevance

/art/compiler/utils/riscv64/
Djni_macro_assembler_riscv64_test.cc331 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A1), kVRegSize), in TEST_F()
332 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A2), kVRegSize), in TEST_F()
333 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A3), 2 * kVRegSize), in TEST_F()
334 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A4), kVRegSize), in TEST_F()
335 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A5), 2 * kVRegSize), in TEST_F()
336 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A6), kVRegSize), in TEST_F()
337 ArgumentLocation(Riscv64ManagedRegister::FromXRegister(A7), kVRegSize), in TEST_F()
338 ArgumentLocation(FrameOffset(76), 2 * kVRegSize), in TEST_F()
339 ArgumentLocation(FrameOffset(84), kVRegSize), in TEST_F()
377 ArgumentLocation(FrameOffset(40), kVRegSize), in TEST_F()
[all …]
/art/compiler/utils/
Dassembler_thumb_test.cc169 ArgumentLocation(FrameOffset(0), 2 * kVRegSize), in TEST_F()
170 ArgumentLocation(FrameOffset(8), 2 * kVRegSize), in TEST_F()
171 ArgumentLocation(FrameOffset(16), kVRegSize), in TEST_F()
175 ArgumentLocation(ArmManagedRegister::FromCoreRegister(R1), kVRegSize), in TEST_F()
176 ArgumentLocation(ArmManagedRegister::FromRegisterPair(R2_R3), 2 * kVRegSize), in TEST_F()
177 ArgumentLocation(FrameOffset(48), 2 * kVRegSize), in TEST_F()
178 ArgumentLocation(FrameOffset(56), kVRegSize), in TEST_F()
179 ArgumentLocation(FrameOffset(60), kVRegSize), in TEST_F()
193 ArgumentLocation(ArmManagedRegister::FromRegisterPair(R0_R1), 2 * kVRegSize), in TEST_F()
194 ArgumentLocation(ArmManagedRegister::FromRegisterPair(R2_R3), 2 * kVRegSize), in TEST_F()
[all …]
/art/runtime/
Dnterp_helpers.cc162 DCHECK(IsAlignedParam(kVRegSize * 2, pointer_size)); in NterpGetFrameSizeWithoutPadding()
165 (num_regs * kVRegSize) * 2 + // dex registers and reference registers in NterpGetFrameSizeWithoutPadding()
168 (out_regs * kVRegSize) + // out arguments in NterpGetFrameSizeWithoutPadding()
191 return NterpGetReferenceArray(frame) + (num_regs * kVRegSize); in NterpGetRegistersArray()
199 RoundUp(out_regs * kVRegSize, kPointerSize) + // out arguments and pointer alignment in NterpGetReferenceArray()
208 RoundUp(out_regs * kVRegSize, kPointerSize); // out arguments and pointer alignment in NterpGetDexPC()
Druntime_globals.h29 static constexpr size_t kVRegSize = 4; variable
/art/compiler/optimizing/
Dregister_allocation_resolver.cc85 current->SetSpillSlot(slot * kVRegSize); in Resolve()
126 current->SetSpillSlot(slot * kVRegSize); in Resolve()
310 (codegen_->GetSIMDRegisterWidth() / kVRegSize == num_of_slots)) in ConnectSiblings()
397 locations->SetStackBit(current->GetParent()->GetSpillSlot() / kVRegSize); in ConnectSiblings()
472 (codegen_->GetSIMDRegisterWidth() == num_of_slots * kVRegSize)) in ConnectSplitSiblings()
Dcode_generator.cc403 (number_of_out_slots + number_of_spill_slots) * kVRegSize, GetPreferredSlotsAlignment()); in InitializeCodeGeneration()
624 DCHECK_ALIGNED(param_size, kVRegSize); in CreateStringBuilderAppendLocations()
625 size_t num_vregs = param_size / kVRegSize; in CreateStringBuilderAppendLocations()
1372 Kind::kInStack, location.GetHighStackIndex(kVRegSize)); in EmitVRegInfo()
1385 stack_map_stream->AddDexRegisterEntry(Kind::kInStack, offset + kVRegSize); in EmitVRegInfo()
1407 stack_map_stream->AddDexRegisterEntry(Kind::kInStack, offset + kVRegSize); in EmitVRegInfo()
1504 location.GetHighStackIndex(kVRegSize)); in EmitVRegInfoOnlyCatchPhis()
1614 locations->ClearStackBit(dest.GetStackIndex() / kVRegSize); in ClearSpillSlotsFromLoopPhisInStackMap()
1731 locations->SetStackBit(stack_offset / kVRegSize); in SaveLiveRegisters()
Dregister_allocator.cc218 + current->GetParent()->GetSpillSlot() / kVRegSize in ValidateIntervals()
Dcode_generator.h206 + parameter->GetIndex() * kVRegSize; in GetStackSlotOfParameter()
957 return static_cast<size_t>(pointer_size_) + index * kVRegSize; in GetStackOffsetOf()
Dssa_liveness_analysis.cc499 return definition->AsVecOperation()->GetVectorNumberOfBytes() / kVRegSize; in NumberOfSpillSlotsNeeded()
Dregister_allocator_linear_scan.cc86 reserved_out_slots_ = ptr_size / kVRegSize + codegen->GetGraph()->GetMaximumNumberOfOutVRegs(); in RegisterAllocatorLinearScan()
Dcode_generator_arm64.cc185 locations->SetStackBit(stack_offset / kVRegSize); in SaveLiveRegisters()
Dcode_generator_arm_vixl.cc311 locations->SetStackBit(stack_offset / kVRegSize); in SaveLiveRegisters()