| /art/compiler/optimizing/ |
| D | code_generator_arm_vixl.cc | 4973 Location out_loc = locations->Out(); in GenerateMinMaxInt() local
4977 vixl32::Register out = RegisterFrom(out_loc); in GenerateMinMaxInt()
4995 Location out_loc = locations->Out(); in GenerateMinMaxLong() local
4999 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder. in GenerateMinMaxLong()
5007 vixl32::Register out_lo = LowRegisterFrom(out_loc); in GenerateMinMaxLong()
5008 vixl32::Register out_hi = HighRegisterFrom(out_loc); in GenerateMinMaxLong()
5035 Location out_loc = locations->Out(); in GenerateMinMaxFloat() local
5039 DCHECK(out_loc.Equals(op1_loc)); // out_loc is set as SameAsFirstInput() in location builder. in GenerateMinMaxFloat()
5045 vixl32::SRegister out = SRegisterFrom(out_loc); in GenerateMinMaxFloat()
5096 Location out_loc = locations->Out(); in GenerateMinMaxDouble() local
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| D | code_generator_x86_64.cc | 4722 Location out_loc = locations->Out(); in GenerateMinMaxFP() local
4723 XmmRegister out = out_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()
4727 DCHECK(out_loc.Equals(op1_loc)); in GenerateMinMaxFP()
5795 Location out_loc = locations->Out(); in VisitArrayGet() local
5809 instruction, out_loc, obj, data_offset, index, /* needs_null_check= */ true); in VisitArrayGet()
5811 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet()
5820 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet()
5823 instruction, out_loc, out_loc, obj_loc, data_offset, index); in VisitArrayGet()
5831 CpuRegister out = out_loc.AsRegister<CpuRegister>(); in VisitArrayGet()
5847 codegen_->LoadFromMemoryNoReference(type, out_loc, src); in VisitArrayGet()
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| D | code_generator_riscv64.cc | 2799 Location out_loc = locations->Out(); in VisitArrayGet() local
2821 XRegister out = out_loc.AsRegister<XRegister>(); in VisitArrayGet()
2849 out_loc, in VisitArrayGet()
2856 out_loc, in VisitArrayGet()
2866 Load(out_loc, obj, offset, type); in VisitArrayGet()
2874 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet()
2880 Load(out_loc, tmp, data_offset, type); in VisitArrayGet()
2889 instruction, out_loc, out_loc, obj_loc, data_offset, index); in VisitArrayGet()
3888 Location out_loc = locations->Out(); in VisitInstanceOf() local
3889 XRegister out = out_loc.AsRegister<XRegister>(); in VisitInstanceOf()
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| D | intrinsics_x86.cc | 501 Location out_loc = locations->Out(); in GenLowestOneBit() local
508 __ xorl(out_loc.AsRegisterPairLow<Register>(), out_loc.AsRegisterPairLow<Register>()); in GenLowestOneBit()
509 __ xorl(out_loc.AsRegisterPairHigh<Register>(), out_loc.AsRegisterPairHigh<Register>()); in GenLowestOneBit()
511 __ xorl(out_loc.AsRegister<Register>(), out_loc.AsRegister<Register>()); in GenLowestOneBit()
521 codegen->Load32BitValue(out_loc.AsRegisterPairLow<Register>(), 0); in GenLowestOneBit()
522 codegen->Load32BitValue(out_loc.AsRegisterPairHigh<Register>(), 1 << shift); in GenLowestOneBit()
524 codegen->Load32BitValue(out_loc.AsRegisterPairLow<Register>(), 1 << value); in GenLowestOneBit()
525 codegen->Load32BitValue(out_loc.AsRegisterPairHigh<Register>(), 0); in GenLowestOneBit()
528 codegen->Load32BitValue(out_loc.AsRegister<Register>(), 1 << value); in GenLowestOneBit()
538 Register out_lo = out_loc.AsRegisterPairLow<Register>(); in GenLowestOneBit()
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| D | code_generator_x86.cc | 4586 Location out_loc = locations->Out(); in GenerateMinMaxFP() local
4587 XmmRegister out = out_loc.AsFpuRegister<XmmRegister>(); in GenerateMinMaxFP()
4591 DCHECK(out_loc.Equals(op1_loc)); in GenerateMinMaxFP()
6475 Location out_loc = locations->Out(); in VisitArrayGet() local
6489 instruction, out_loc, obj, data_offset, index, /* needs_null_check= */ true); in VisitArrayGet()
6491 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet()
6500 codegen_->MaybeGenerateReadBarrierSlow(instruction, out_loc, out_loc, obj_loc, offset); in VisitArrayGet()
6503 instruction, out_loc, out_loc, obj_loc, data_offset, index); in VisitArrayGet()
6510 Register out = out_loc.AsRegister<Register>(); in VisitArrayGet()
6526 codegen_->LoadFromMemoryNoBarrier(type, out_loc, src, instruction); in VisitArrayGet()
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| D | code_generator_arm64.cc | 4184 Location out_loc = locations->Out(); in VisitInstanceOf() local
4213 out_loc, in VisitInstanceOf()
4231 out_loc, in VisitInstanceOf()
4242 out_loc, in VisitInstanceOf()
4262 out_loc, in VisitInstanceOf()
4274 out_loc, in VisitInstanceOf()
4294 out_loc, in VisitInstanceOf()
4306 out_loc, in VisitInstanceOf()
4325 out_loc, in VisitInstanceOf()
4417 out_loc, in VisitInstanceOf()
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| D | intrinsics_riscv64.cc | 2068 Location out_loc = locations->Out(); in GenUnsafeGet() local
2069 XRegister out = out_loc.AsRegister<XRegister>(); in GenUnsafeGet()
2084 out_loc, in GenUnsafeGet()
2094 codegen->GetInstructionVisitor()->Load(out_loc, out, /*offset=*/ 0, type); in GenUnsafeGet()
2098 invoke, out_loc, out_loc, object_loc, /*offset=*/ 0u, /*index=*/ offset_loc); in GenUnsafeGet()
2688 Location out_loc = locations->Out(); in GenUnsafeGetAndUpdate() local
2689 XRegister out = out_loc.AsRegister<XRegister>(); // Result. in GenUnsafeGetAndUpdate()
2723 codegen->AddGcRootBakerBarrierBarrierSlowPath(invoke, out_loc, kBakerReadBarrierTemp); in GenUnsafeGetAndUpdate()
2724 codegen->EmitBakerReadBarierMarkingCheck(rb_slow_path, out_loc, kBakerReadBarrierTemp); in GenUnsafeGetAndUpdate()
2728 out_loc, in GenUnsafeGetAndUpdate()
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| D | code_generator_arm_vixl.h | 598 Location out_loc,
603 Location out_loc,
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| D | intrinsics_arm64.cc | 4865 Location out_loc = locations->Out(); in GenerateVarHandleGet() local
4868 codegen->MaybeGenerateReadBarrierSlow(invoke, out_loc, out_loc, object_loc, 0u, offset_loc); in GenerateVarHandleGet()
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