/art/runtime/arch/arm64/ |
D | asm_support_arm64.S | 145 .macro SAVE_TWO_REGS_BASE base, reg1, reg2, offset 146 stp \reg1, \reg2, [\base, #(\offset)] 148 .cfi_rel_offset \reg2, (\offset) + 8 151 .macro SAVE_TWO_REGS reg1, reg2, offset 152 SAVE_TWO_REGS_BASE sp, \reg1, \reg2, \offset 155 .macro RESTORE_TWO_REGS_BASE base, reg1, reg2, offset 156 ldp \reg1, \reg2, [\base, #(\offset)] 158 .cfi_restore \reg2 161 .macro RESTORE_TWO_REGS reg1, reg2, offset 162 RESTORE_TWO_REGS_BASE sp, \reg1, \reg2, \offset
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D | quick_entrypoints_arm64.S | 35 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment 36 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]! 39 .cfi_rel_offset \reg2, 8 42 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustment 43 ldp \reg1, \reg2, [sp], #(\frame_adjustment) 45 .cfi_restore \reg2
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/art/compiler/utils/ |
D | assembler_test.h | 215 for (auto reg2 : reg2_registers) { variable 219 (assembler_.get()->*f)(reg1, reg2, new_imm * multiplier + bias); 224 ReplaceReg(REG2_TOKEN, (this->*GetName2)(reg2), &base); 250 for (auto reg2 : reg2_registers) { in RepeatTemplatedRegistersImmBits() local 255 (assembler_.get()->*f)(reg1, reg2, reg3, new_imm + bias); in RepeatTemplatedRegistersImmBits() 260 ReplaceReg(REG2_TOKEN, (this->*GetName2)(reg2), &base); in RepeatTemplatedRegistersImmBits() 287 for (auto reg2 : reg2_registers) { in RepeatTemplatedImmBitsRegisters() local 291 (assembler_.get()->*f)(new_imm, reg1, reg2); in RepeatTemplatedImmBitsRegisters() 296 ReplaceReg(REG2_TOKEN, (this->*GetName2)(reg2), &base); in RepeatTemplatedImmBitsRegisters() 405 for (auto reg2 : reg2_registers) { variable [all …]
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/art/compiler/utils/riscv64/ |
D | assembler_riscv64_test.cc | 1042 for (FRegister reg2 : fp_regs) { in RepeatFFFFRoundingMode() local 1044 ReplaceReg(REG2_TOKEN, GetFPRegName(reg2), &base2); in RepeatFFFFRoundingMode() 1052 (GetAssembler()->*f)(reg1, reg2, reg3, reg4, rm); in RepeatFFFFRoundingMode() 1075 for (FRegister reg2 : fp_regs) { in RepeatFFFRoundingMode() local 1077 ReplaceReg(REG2_TOKEN, GetFPRegName(reg2), &base2); in RepeatFFFRoundingMode() 1082 (GetAssembler()->*f)(reg1, reg2, reg3, rm); in RepeatFFFRoundingMode() 1168 for (XRegister reg2 : GetRegistersShort()) { in RepeatTemplatedShortRegistersImm() local 1175 (GetAssembler()->*f)(reg1, reg2, imm); in RepeatTemplatedShortRegistersImm() 1179 ReplaceReg(REG2_TOKEN, GetRegisterName(reg2), &base); in RepeatTemplatedShortRegistersImm() 1286 for (Reg2 reg2 : reg2_registers) { in RepeatTemplatedRegistersRoundingMode() local [all …]
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/art/compiler/optimizing/ |
D | code_generator_x86_64.h | 206 void Exchange64(CpuRegister reg1, CpuRegister reg2);
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D | code_generator_x86_64.cc | 6480 void ParallelMoveResolverX86_64::Exchange64(CpuRegister reg1, CpuRegister reg2) { in Exchange64() argument 6482 __ movq(reg1, reg2); in Exchange64() 6483 __ movq(reg2, CpuRegister(TMP)); in Exchange64()
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D | code_generator_arm_vixl.cc | 4899 vixl32::Register reg2 = RegisterFrom(second); in VisitRem() local 4904 __ Sdiv(temp, reg1, reg2); in VisitRem() 4905 __ Mls(out_reg, temp, reg2, reg1); in VisitRem()
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64.h | 818 void testl(CpuRegister reg1, CpuRegister reg2); 822 void testq(CpuRegister reg1, CpuRegister reg2);
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D | assembler_x86_64.cc | 4173 void X86_64Assembler::testl(CpuRegister reg1, CpuRegister reg2) { in testl() argument 4175 EmitOptionalRex32(reg1, reg2); in testl() 4177 EmitRegisterOperand(reg1.LowBits(), reg2.LowBits()); in testl() 4215 void X86_64Assembler::testq(CpuRegister reg1, CpuRegister reg2) { in testq() argument 4217 EmitRex64(reg1, reg2); in testq() 4219 EmitRegisterOperand(reg1.LowBits(), reg2.LowBits()); in testq()
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/art/compiler/utils/x86/ |
D | assembler_x86.h | 765 void testl(Register reg1, Register reg2);
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D | assembler_x86.cc | 3065 void X86Assembler::testl(Register reg1, Register reg2) { in testl() argument 3068 EmitRegisterOperand(reg1, reg2); in testl()
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