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Searched refs:rs2_s (Results 1 – 2 of 2) sorted by relevance

/art/compiler/utils/riscv64/
Dassembler_riscv64.h553 void CSw(XRegister rs2_s, XRegister rs1_s, int32_t offset);
554 void CSd(XRegister rs2_s, XRegister rs1_s, int32_t offset);
555 void CFSd(FRegister rs2_s, XRegister rs1_s, int32_t offset);
569 void CAnd(XRegister rd_s, XRegister rs2_s);
570 void COr(XRegister rd_s, XRegister rs2_s);
571 void CXor(XRegister rd_s, XRegister rs2_s);
572 void CSub(XRegister rd_s, XRegister rs2_s);
573 void CAddw(XRegister rd_s, XRegister rs2_s);
574 void CSubw(XRegister rd_s, XRegister rs2_s);
588 void CMul(XRegister rd_s, XRegister rs2_s);
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Dassembler_riscv64.cc1297 void Riscv64Assembler::CSw(XRegister rs2_s, XRegister rs1_s, int32_t offset) { in CSw() argument
1299 EmitCM(0b110u, ExtractOffset52_6(offset), rs1_s, rs2_s, 0b00u); in CSw()
1302 void Riscv64Assembler::CSd(XRegister rs2_s, XRegister rs1_s, int32_t offset) { in CSd() argument
1304 EmitCM(0b111u, ExtractOffset53_76(offset), rs1_s, rs2_s, 0b00u); in CSd()
1307 void Riscv64Assembler::CFSd(FRegister rs2_s, XRegister rs1_s, int32_t offset) { in CFSd() argument
1310 EmitCM(0b101u, ExtractOffset53_76(offset), rs1_s, rs2_s, 0b00u); in CFSd()
1416 void Riscv64Assembler::CAnd(XRegister rd_s, XRegister rs2_s) { in CAnd() argument
1418 EmitCAReg(0b100011u, rd_s, 0b11u, rs2_s, 0b01u); in CAnd()
1421 void Riscv64Assembler::COr(XRegister rd_s, XRegister rs2_s) { in COr() argument
1423 EmitCAReg(0b100011u, rd_s, 0b10u, rs2_s, 0b01u); in COr()
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