Home
last modified time | relevance | path

Searched refs:w3 (Results 1 – 13 of 13) sorted by relevance

/art/runtime/interpreter/mterp/arm64ng/
Dfloating_point.S47 lsr w3, wINST, #12 // w3<- B
49 GET_VREG s1, w3
83 EXTRACT_SCALED_VREG w3, w5, w0, 8 // w3<- CC * sizeof(vreg)
85 GET_VREG_DOUBLE_PRESCALED $r2, w3
89 lsr w3, w0, #8 // w3<- CC
91 GET_VREG $r2, w3
110 lsr w3, wINST, #12 // w3<- B
112 GET_VREG $srcreg, w3
127 lsr w3, wINST, #12 // w3<- B
130 GET_VREG_DOUBLE $srcreg, w3
[all …]
Dother.S6 lsr w3, wINST, #8 // w3<- AA
12 SET_VREG w0, w3 // vAA<- w0
18 lsr w3, wINST, #8 // w3<- AA
20 SET_VREG w0, w3 // vAA<- w0
36 lsr w3, wINST, #8 // r3<- AA
39 SET_VREG w0, w3 // vAA<- r0
90 FETCH w3, 4 // w3<- HHHH (high)
103 lsr w3, wINST, #8 // w3<- AA
106 SET_VREG_WIDE x0, w3
112 lsr w3, wINST, #8 // w3<- AA
[all …]
Darray.S10 FETCH_B w3, 1, 1 // w3<- CC
12 GET_VREG w1, w3 // w1<- vCC (requested index)
14 ldr w3, [x0, #MIRROR_ARRAY_LENGTH_OFFSET] // w3<- arrayObj->length
16 cmp w1, w3 // compare unsigned index, length
67 FETCH_B w3, 1, 1 // w3<- CC
69 GET_VREG w1, w3 // w1<- vCC (requested index)
71 ldr w3, [x0, #MIRROR_ARRAY_LENGTH_OFFSET] // w3<- arrayObj->length
75 cmp w1, w3 // compare unsigned index, length
123 ldr w3, [x0, #MIRROR_ARRAY_LENGTH_OFFSET] // w3<- array length
125 SET_VREG w3, w2 // vB<- length
[all …]
Darithmetic.S20 lsr w3, w0, #8 // w3<- CC
22 GET_VREG w1, w3 // w1<- vCC
51 lsr w3, wINST, #12 // w3<- B
53 GET_VREG w1, w3 // w1<- vB
114 FETCH_S w3, 1 // w3<- ssssCCBB (sign-extended for CC)
116 and w2, w3, #255 // w2<- BB
200 lsr w3, wINST, #8 // w3<- AA
208 SET_VREG_WIDE x0, w3 // vAA<- x0
238 lsr w3, wINST, #12 // w3<- B
239 GET_VREG w0, w3 // w0<- vB
[all …]
Dobject.S33 ldr w3, [x1, #MIRROR_CLASS_ACCESS_FLAGS_OFFSET]
34 tbnz w3, #MIRROR_CLASS_IS_INTERFACE_FLAG_BIT, 2f
35 ldr w3, [x1, #MIRROR_CLASS_COMPONENT_TYPE_OFFSET]
36 UNPOISON_HEAP_REF w3
37 cbnz w3, 5f
63 ldrh w3, [x3, #MIRROR_CLASS_OBJECT_PRIMITIVE_TYPE_OFFSET]
65 cbnz w3, 2b
107 ldr w3, [x1, #MIRROR_CLASS_ACCESS_FLAGS_OFFSET]
108 tbnz w3, #MIRROR_CLASS_IS_INTERFACE_FLAG_BIT, 5f
109 ldr w3, [x1, #MIRROR_CLASS_COMPONENT_TYPE_OFFSET]
[all …]
Dinvoke.S92 ldrh w3, [x26, #ART_METHOD_IMT_INDEX_OFFSET]
95 ldr x0, [x2, w3, uxtw #3]
104 ldrh w3, [x26, #ART_METHOD_METHOD_INDEX_OFFSET]
105 and w3, w3, #ART_METHOD_IMT_MASK
Dcontrol_flow.S11 GET_VREG w3, w1 // w3<- vB
13 cmp w2, w3 // compare (vA, vB)
130 lsr w3, wINST, #8 // w3<- AA
132 GET_VREG w1, w3 // w1<- vAA
Dmain.S538 FETCH w3, 2
918 GET_VREG w3, wip
1026 LOOP_OVER_SHORTY_LOADING_GPRS x3, w3, x11, x9, x10, .Lgpr_setup_finished_\suffix
1270 ldr w3, [x8, #8]
1301 FETCH w3, 2 // dex register of first argument
1303 GET_VREG w1, w3
1306 add w3, w3, #1 // Add 1 for next argument
1307 GET_VREG w2, w3
1376 LOOP_RANGE_OVER_SHORTY_LOADING_GPRS x3, w3, x9, w10, w11, .Lgpr_setup_finished_range_\suffix
1663 SETUP_REFERENCE_PARAMETER_IN_GPR w3, x10, x11, w15, x12, .Lxmm_setup_finished
[all …]
/art/runtime/arch/arm64/
Dquick_entrypoints_arm64.S581 INVOKE_STUB_LOAD_REG .Lload_w3, w3, x9, 4, x11, .Lload_w4, x12, .Lload_x4, .Lfill_regs, \suffix
1007 READ_BARRIER_SLOW x3, w3, x0, MIRROR_OBJECT_CLASS_OFFSET
1008 READ_BARRIER_SLOW x3, w3, x3, MIRROR_CLASS_COMPONENT_TYPE_OFFSET
1014 ldr w3, [x0, #MIRROR_OBJECT_CLASS_OFFSET] // Heap reference = 32b; zero-extends to x3.
1015 UNPOISON_HEAP_REF w3
1016 ldr w3, [x3, #MIRROR_CLASS_COMPONENT_TYPE_OFFSET] // Heap reference = 32b; zero-extends to x3.
1017 UNPOISON_HEAP_REF w3
1021 cmp w3, w4 // value's type == array's component type - trivial assignability
1029 strb w3, [x3, x0]
1060 strb w3, [x3, x0]
[all …]
Dmemcmp16_arm64.S35 #define data1w w3
/art/test/476-checker-ctor-fence-redun-elim/src/
DMain.java33 int w3; field in Base
48 return String.format("w0: %d, w1: %d, w2: %d, w3: %d", w0, w1, w2, w3); in baseString()
/art/compiler/jni/
Djni_cfi_test_expected.inc158 // 0x0000003c: str w3, [sp, #196]
/art/compiler/utils/arm64/
Dmanaged_register_arm64_test.cc640 EXPECT_TRUE(vixl::aarch64::w3.Is(Arm64Assembler::reg_w(W3))); in TEST()