1 /*
2  * This file is auto-generated. Modifications will be lost.
3  *
4  * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5  * for more information.
6  */
7 #ifndef _UAPI_ASM_HWPROBE_H
8 #define _UAPI_ASM_HWPROBE_H
9 #include <linux/types.h>
10 struct riscv_hwprobe {
11   __s64 key;
12   __u64 value;
13 };
14 #define RISCV_HWPROBE_KEY_MVENDORID 0
15 #define RISCV_HWPROBE_KEY_MARCHID 1
16 #define RISCV_HWPROBE_KEY_MIMPID 2
17 #define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3
18 #define RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
19 #define RISCV_HWPROBE_KEY_IMA_EXT_0 4
20 #define RISCV_HWPROBE_IMA_FD (1 << 0)
21 #define RISCV_HWPROBE_IMA_C (1 << 1)
22 #define RISCV_HWPROBE_IMA_V (1 << 2)
23 #define RISCV_HWPROBE_EXT_ZBA (1 << 3)
24 #define RISCV_HWPROBE_EXT_ZBB (1 << 4)
25 #define RISCV_HWPROBE_EXT_ZBS (1 << 5)
26 #define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
27 #define RISCV_HWPROBE_EXT_ZBC (1 << 7)
28 #define RISCV_HWPROBE_EXT_ZBKB (1 << 8)
29 #define RISCV_HWPROBE_EXT_ZBKC (1 << 9)
30 #define RISCV_HWPROBE_EXT_ZBKX (1 << 10)
31 #define RISCV_HWPROBE_EXT_ZKND (1 << 11)
32 #define RISCV_HWPROBE_EXT_ZKNE (1 << 12)
33 #define RISCV_HWPROBE_EXT_ZKNH (1 << 13)
34 #define RISCV_HWPROBE_EXT_ZKSED (1 << 14)
35 #define RISCV_HWPROBE_EXT_ZKSH (1 << 15)
36 #define RISCV_HWPROBE_EXT_ZKT (1 << 16)
37 #define RISCV_HWPROBE_EXT_ZVBB (1 << 17)
38 #define RISCV_HWPROBE_EXT_ZVBC (1 << 18)
39 #define RISCV_HWPROBE_EXT_ZVKB (1 << 19)
40 #define RISCV_HWPROBE_EXT_ZVKG (1 << 20)
41 #define RISCV_HWPROBE_EXT_ZVKNED (1 << 21)
42 #define RISCV_HWPROBE_EXT_ZVKNHA (1 << 22)
43 #define RISCV_HWPROBE_EXT_ZVKNHB (1 << 23)
44 #define RISCV_HWPROBE_EXT_ZVKSED (1 << 24)
45 #define RISCV_HWPROBE_EXT_ZVKSH (1 << 25)
46 #define RISCV_HWPROBE_EXT_ZVKT (1 << 26)
47 #define RISCV_HWPROBE_EXT_ZFH (1 << 27)
48 #define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
49 #define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
50 #define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
51 #define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
52 #define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
53 #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
54 #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
55 #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35)
56 #define RISCV_HWPROBE_KEY_CPUPERF_0 5
57 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
58 #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
59 #define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0)
60 #define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
61 #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
62 #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
63 #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
64 #define RISCV_HWPROBE_WHICH_CPUS (1 << 0)
65 #endif
66