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/bionic/libc/private/
Dbionic_inline_raise.h50 register long r0 __asm__("r0") = pid;
51 register long r1 __asm__("r1") = tid;
52 register long r2 __asm__("r2") = sig;
53 register long r3 __asm__("r3") = reinterpret_cast<long>(&info);
54 register long r7 __asm__("r7") = __NR_rt_tgsigqueueinfo;
55 __asm__("swi #0" : "=r"(r0) : "r"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r7) : "memory");
57 register long x0 __asm__("x0") = pid;
58 register long x1 __asm__("x1") = tid;
59 register long x2 __asm__("x2") = sig;
60 register long x3 __asm__("x3") = reinterpret_cast<long>(&info);
[all …]
/bionic/libm/amd64/
Dfenv.c90 __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv)); in feclearexcept()
96 __asm__ __volatile__ ("fldenv %0" : : "m" (fenv)); in feclearexcept()
99 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); in feclearexcept()
101 __asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr)); in feclearexcept()
120 __asm__ __volatile__ ("fnstsw %0" : "=am" (status)); in fegetexceptflag()
123 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); in fegetexceptflag()
147 __asm__ __volatile__ ("fwait"); in feraiseexcept()
166 __asm__ __volatile__ ("fnstenv %0" : "=m" (fenv)); in fesetexceptflag()
173 __asm__ __volatile__ ("fldenv %0" : : "m" (fenv)); in fesetexceptflag()
176 __asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr)); in fesetexceptflag()
[all …]
/bionic/libm/riscv64/
Dfenv.c35 __asm__ __volatile__("frcsr %0" : "=r"(*envp)); in fegetenv()
43 __asm__ __volatile__("fscsr %z0" : : "r"(*envp)); in fesetenv()
49 __asm__ __volatile__("csrc fflags, %0" : : "r"(excepts & FE_ALL_EXCEPT)); in feclearexcept()
65 __asm__ __volatile__("csrs fflags, %0" : : "r"(excepts)); in feraiseexcept()
71 __asm__ __volatile__("frflags %0" : "=r"(flags)); in fetestexcept()
77 __asm__ __volatile__("frrm %0" : "=r"(rm)); in fegetround()
83 __asm__ __volatile__("fsrm %z0" : : "r"(round)); in fesetround()
/bionic/libc/platform/bionic/
Dtls.h32 # define __get_tls() ({ void** __val; __asm__("mrs %0, tpidr_el0" : "=r"(__val)); __val; })
34 # define __get_tls() ({ void** __val; __asm__("mrc p15, 0, %0, c13, c0, 3" : "=r"(__val)); __val; })
36 # define __get_tls() ({ void** __val; __asm__("movl %%gs:0, %0" : "=r"(__val)); __val; })
38 # define __get_tls() ({ void** __val; __asm__("mv %0, tp" : "=r"(__val)); __val; })
40 # define __get_tls() ({ void** __val; __asm__("mov %%fs:0, %0" : "=r"(__val)); __val; })
Dmte.h56 __asm__ __volatile__(".arch_extension mte; mrs %0, tco; msr tco, #1" : "=r"(prev_tco_)); in ScopedDisableMTE()
62 __asm__ __volatile__(".arch_extension mte; msr tco, %0" : : "r"(prev_tco_)); in ~ScopedDisableMTE()
/bionic/libc/arch-arm/
Ddynamic_function_dispatch.cpp69 register long r0 __asm__("r0") = AT_FDCWD; in ifunc_open() local
70 register long r1 __asm__("r1") = reinterpret_cast<long>(pathname); in ifunc_open() local
71 register long r2 __asm__("r2") = O_RDONLY; in ifunc_open() local
72 register long r3 __asm__("r3") = 0; in ifunc_open() local
73 register long r7 __asm__("r7") = __NR_openat; in ifunc_open() local
74 __asm__ volatile("swi #0" : "=r"(r0) : "r"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r7)); in ifunc_open()
79 register long r0 __asm__("r0") = fd; in ifunc_read() local
80 register long r1 __asm__("r1") = reinterpret_cast<long>(buf); in ifunc_read() local
81 register long r2 __asm__("r2") = count; in ifunc_read() local
82 register long r7 __asm__("r7") = __NR_read; in ifunc_read() local
[all …]
/bionic/libc/arch-common/bionic/
Dcrtbegin.c88 __asm__(PRE "bti j; mov x29,#0; mov x30,#0; mov x0,sp; b _start_main" POST);
90 __asm__(PRE "mov fp,#0; mov lr,#0; mov r0,sp; b _start_main" POST);
92 __asm__(PRE
96 __asm__(PRE "li fp,0; li ra,0; mv a0,sp; tail _start_main" POST);
98 __asm__(PRE "xorl %ebp, %ebp; movq %rsp,%rdi; andq $~0xf,%rsp; callq _start_main" POST);
/bionic/tests/libs/
Dversioned_lib_v3.cpp40 __asm__(".symver versioned_function_v1,versioned_function@TESTLIB_V1");
41 __asm__(".symver versioned_function_v2,versioned_function@TESTLIB_V2");
42 __asm__(".symver versioned_function_v3,versioned_function@@TESTLIB_V3");
Dcfi_test_bad_lib.cpp3 __asm__(".globl __cfi_check");
4 __asm__("__cfi_check = dummy + 3"); // Not aligned to anything.
Dversioned_lib_v2.cpp34 __asm__(".symver versioned_function_v1,versioned_function@TESTLIB_V1");
35 __asm__(".symver versioned_function_v2,versioned_function@@TESTLIB_V2");
Dversioned_lib_other.cpp21 __asm__(".symver versioned_function_v2,versioned_function@@TESTLIB_V2");
Dversioned_lib_v1.cpp30 __asm__(".symver versioned_function_v1,versioned_function@@TESTLIB_V1");
/bionic/libc/arch-riscv64/
Ddynamic_function_dispatch.cpp39 register long a0 __asm__("a0") = dir_fd; in ifunc_faccessat() local
40 register long a1 __asm__("a1") = reinterpret_cast<long>(path); in ifunc_faccessat() local
41 register long a2 __asm__("a2") = mode; in ifunc_faccessat() local
42 register long a7 __asm__("a7") = __NR_faccessat; in ifunc_faccessat() local
43 __asm__("ecall" : "=r"(a0) : "r"(a0), "r"(a1), "r"(a2), "r"(a7) : "memory"); in ifunc_faccessat()
/bionic/libc/bionic/
Dvdso.cpp98 register long a0 __asm__("a0") = reinterpret_cast<long>(pairs); in __riscv_hwprobe() local
99 register long a1 __asm__("a1") = pair_count; in __riscv_hwprobe() local
100 register long a2 __asm__("a2") = cpu_count; in __riscv_hwprobe() local
101 register long a3 __asm__("a3") = reinterpret_cast<long>(cpus); in __riscv_hwprobe() local
102 register long a4 __asm__("a4") = flags; in __riscv_hwprobe() local
103 register long a7 __asm__("a7") = __NR_riscv_hwprobe; in __riscv_hwprobe() local
104 __asm__ volatile("ecall" : "=r"(a0) : "r"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a7)); in __riscv_hwprobe()
Dmemset_explicit.cpp34 __asm__ __volatile__("" : : "r"(__dst) : "memory"); in memset_explicit()
/bionic/libc/arch-arm/bionic/
Dexidx_dynamic.c48 __asm__(".symver __gnu_Unwind_Find_exidx_impl,__gnu_Unwind_Find_exidx@LIBC_PRIVATE");
49 __asm__(".symver __gnu_Unwind_Find_exidx_impl2,__gnu_Unwind_Find_exidx@@LIBC_N");
/bionic/libm/
Dfreebsd-compat.h24 __asm__(".weak " #alias); \
25 __asm__(".equ " #alias ", " #sym)
/bionic/libc/arch-x86/bionic/
D__set_tls.cpp43 __asm__ __volatile__("movw %%gs, %w0" : "=q"(gs) /*output*/); in __init_user_desc()
69 __asm__ __volatile__("movw %w0, %%gs" : /*output*/ : "q"(selector) /*input*/ : /*clobber*/); in __set_tls()
/bionic/libm/arm/
Dfenv.c37 __asm__ __volatile__("vmrs %0,fpscr" : "=r"(_fpscr)); in fegetenv()
44 __asm__ __volatile__("vmsr fpscr,%0" : : "ri"(_fpscr)); in fesetenv()
/bionic/libm/arm64/
Dfenv.c41 __asm__ __volatile__("mrs %0," REGISTER : "=r" (__value64)); \
49 __asm__ __volatile__("msr " REGISTER ",%0" : : "ri" (__value64)); \
/bionic/tools/versioner/tests/extern_cpp_mismatch/headers/
Dstring.h5 #define __RENAME(x) __asm__(#x)
/bionic/tools/versioner/tests/extern_cpp/headers/
Dstring.h5 #define __RENAME(x) __asm__(#x)
/bionic/tools/versioner/tests/fortify_inline/headers/
Dfcntl.h5 extern int open_real(const char* name, int flags, ...) __asm__("open");
/bionic/tools/versioner/tests/preprocessor_file_offset_bits/expected/
Dfoo.h15 #define __RENAME(x) __asm__(#x)
/bionic/tools/versioner/tests/preprocessor_file_offset_bits/headers/
Dfoo.h15 #define __RENAME(x) __asm__(#x)

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