1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __VMW_PVRDMA_ABI_H__ 8 #define __VMW_PVRDMA_ABI_H__ 9 #include <linux/types.h> 10 #define PVRDMA_UVERBS_ABI_VERSION 3 11 #define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF 12 #define PVRDMA_UAR_QP_OFFSET 0 13 #define PVRDMA_UAR_QP_SEND (1 << 30) 14 #define PVRDMA_UAR_QP_RECV (1 << 31) 15 #define PVRDMA_UAR_CQ_OFFSET 4 16 #define PVRDMA_UAR_CQ_ARM_SOL (1 << 29) 17 #define PVRDMA_UAR_CQ_ARM (1 << 30) 18 #define PVRDMA_UAR_CQ_POLL (1 << 31) 19 #define PVRDMA_UAR_SRQ_OFFSET 8 20 #define PVRDMA_UAR_SRQ_RECV (1 << 30) 21 enum pvrdma_wr_opcode { 22 PVRDMA_WR_RDMA_WRITE, 23 PVRDMA_WR_RDMA_WRITE_WITH_IMM, 24 PVRDMA_WR_SEND, 25 PVRDMA_WR_SEND_WITH_IMM, 26 PVRDMA_WR_RDMA_READ, 27 PVRDMA_WR_ATOMIC_CMP_AND_SWP, 28 PVRDMA_WR_ATOMIC_FETCH_AND_ADD, 29 PVRDMA_WR_LSO, 30 PVRDMA_WR_SEND_WITH_INV, 31 PVRDMA_WR_RDMA_READ_WITH_INV, 32 PVRDMA_WR_LOCAL_INV, 33 PVRDMA_WR_FAST_REG_MR, 34 PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP, 35 PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD, 36 PVRDMA_WR_BIND_MW, 37 PVRDMA_WR_REG_SIG_MR, 38 PVRDMA_WR_ERROR, 39 }; 40 enum pvrdma_wc_status { 41 PVRDMA_WC_SUCCESS, 42 PVRDMA_WC_LOC_LEN_ERR, 43 PVRDMA_WC_LOC_QP_OP_ERR, 44 PVRDMA_WC_LOC_EEC_OP_ERR, 45 PVRDMA_WC_LOC_PROT_ERR, 46 PVRDMA_WC_WR_FLUSH_ERR, 47 PVRDMA_WC_MW_BIND_ERR, 48 PVRDMA_WC_BAD_RESP_ERR, 49 PVRDMA_WC_LOC_ACCESS_ERR, 50 PVRDMA_WC_REM_INV_REQ_ERR, 51 PVRDMA_WC_REM_ACCESS_ERR, 52 PVRDMA_WC_REM_OP_ERR, 53 PVRDMA_WC_RETRY_EXC_ERR, 54 PVRDMA_WC_RNR_RETRY_EXC_ERR, 55 PVRDMA_WC_LOC_RDD_VIOL_ERR, 56 PVRDMA_WC_REM_INV_RD_REQ_ERR, 57 PVRDMA_WC_REM_ABORT_ERR, 58 PVRDMA_WC_INV_EECN_ERR, 59 PVRDMA_WC_INV_EEC_STATE_ERR, 60 PVRDMA_WC_FATAL_ERR, 61 PVRDMA_WC_RESP_TIMEOUT_ERR, 62 PVRDMA_WC_GENERAL_ERR, 63 }; 64 enum pvrdma_wc_opcode { 65 PVRDMA_WC_SEND, 66 PVRDMA_WC_RDMA_WRITE, 67 PVRDMA_WC_RDMA_READ, 68 PVRDMA_WC_COMP_SWAP, 69 PVRDMA_WC_FETCH_ADD, 70 PVRDMA_WC_BIND_MW, 71 PVRDMA_WC_LSO, 72 PVRDMA_WC_LOCAL_INV, 73 PVRDMA_WC_FAST_REG_MR, 74 PVRDMA_WC_MASKED_COMP_SWAP, 75 PVRDMA_WC_MASKED_FETCH_ADD, 76 PVRDMA_WC_RECV = 1 << 7, 77 PVRDMA_WC_RECV_RDMA_WITH_IMM, 78 }; 79 enum pvrdma_wc_flags { 80 PVRDMA_WC_GRH = 1 << 0, 81 PVRDMA_WC_WITH_IMM = 1 << 1, 82 PVRDMA_WC_WITH_INVALIDATE = 1 << 2, 83 PVRDMA_WC_IP_CSUM_OK = 1 << 3, 84 PVRDMA_WC_WITH_SMAC = 1 << 4, 85 PVRDMA_WC_WITH_VLAN = 1 << 5, 86 PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6, 87 PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE, 88 }; 89 enum pvrdma_network_type { 90 PVRDMA_NETWORK_IB, 91 PVRDMA_NETWORK_ROCE_V1 = PVRDMA_NETWORK_IB, 92 PVRDMA_NETWORK_IPV4, 93 PVRDMA_NETWORK_IPV6 94 }; 95 struct pvrdma_alloc_ucontext_resp { 96 __u32 qp_tab_size; 97 __u32 reserved; 98 }; 99 struct pvrdma_alloc_pd_resp { 100 __u32 pdn; 101 __u32 reserved; 102 }; 103 struct pvrdma_create_cq { 104 __aligned_u64 buf_addr; 105 __u32 buf_size; 106 __u32 reserved; 107 }; 108 struct pvrdma_create_cq_resp { 109 __u32 cqn; 110 __u32 reserved; 111 }; 112 struct pvrdma_resize_cq { 113 __aligned_u64 buf_addr; 114 __u32 buf_size; 115 __u32 reserved; 116 }; 117 struct pvrdma_create_srq { 118 __aligned_u64 buf_addr; 119 __u32 buf_size; 120 __u32 reserved; 121 }; 122 struct pvrdma_create_srq_resp { 123 __u32 srqn; 124 __u32 reserved; 125 }; 126 struct pvrdma_create_qp { 127 __aligned_u64 rbuf_addr; 128 __aligned_u64 sbuf_addr; 129 __u32 rbuf_size; 130 __u32 sbuf_size; 131 __aligned_u64 qp_addr; 132 }; 133 struct pvrdma_create_qp_resp { 134 __u32 qpn; 135 __u32 qp_handle; 136 }; 137 struct pvrdma_ex_cmp_swap { 138 __aligned_u64 swap_val; 139 __aligned_u64 compare_val; 140 __aligned_u64 swap_mask; 141 __aligned_u64 compare_mask; 142 }; 143 struct pvrdma_ex_fetch_add { 144 __aligned_u64 add_val; 145 __aligned_u64 field_boundary; 146 }; 147 struct pvrdma_av { 148 __u32 port_pd; 149 __u32 sl_tclass_flowlabel; 150 __u8 dgid[16]; 151 __u8 src_path_bits; 152 __u8 gid_index; 153 __u8 stat_rate; 154 __u8 hop_limit; 155 __u8 dmac[6]; 156 __u8 reserved[6]; 157 }; 158 struct pvrdma_sge { 159 __aligned_u64 addr; 160 __u32 length; 161 __u32 lkey; 162 }; 163 struct pvrdma_rq_wqe_hdr { 164 __aligned_u64 wr_id; 165 __u32 num_sge; 166 __u32 total_len; 167 }; 168 struct pvrdma_sq_wqe_hdr { 169 __aligned_u64 wr_id; 170 __u32 num_sge; 171 __u32 total_len; 172 __u32 opcode; 173 __u32 send_flags; 174 union { 175 __be32 imm_data; 176 __u32 invalidate_rkey; 177 } ex; 178 __u32 reserved; 179 union { 180 struct { 181 __aligned_u64 remote_addr; 182 __u32 rkey; 183 __u8 reserved[4]; 184 } rdma; 185 struct { 186 __aligned_u64 remote_addr; 187 __aligned_u64 compare_add; 188 __aligned_u64 swap; 189 __u32 rkey; 190 __u32 reserved; 191 } atomic; 192 struct { 193 __aligned_u64 remote_addr; 194 __u32 log_arg_sz; 195 __u32 rkey; 196 union { 197 struct pvrdma_ex_cmp_swap cmp_swap; 198 struct pvrdma_ex_fetch_add fetch_add; 199 } wr_data; 200 } masked_atomics; 201 struct { 202 __aligned_u64 iova_start; 203 __aligned_u64 pl_pdir_dma; 204 __u32 page_shift; 205 __u32 page_list_len; 206 __u32 length; 207 __u32 access_flags; 208 __u32 rkey; 209 __u32 reserved; 210 } fast_reg; 211 struct { 212 __u32 remote_qpn; 213 __u32 remote_qkey; 214 struct pvrdma_av av; 215 } ud; 216 } wr; 217 }; 218 struct pvrdma_cqe { 219 __aligned_u64 wr_id; 220 __aligned_u64 qp; 221 __u32 opcode; 222 __u32 status; 223 __u32 byte_len; 224 __be32 imm_data; 225 __u32 src_qp; 226 __u32 wc_flags; 227 __u32 vendor_err; 228 __u16 pkey_index; 229 __u16 slid; 230 __u8 sl; 231 __u8 dlid_path_bits; 232 __u8 port_num; 233 __u8 smac[6]; 234 __u8 network_hdr_type; 235 __u8 reserved2[6]; 236 }; 237 #endif 238