Home
last modified time | relevance | path

Searched refs:DRM_IOW (Results 1 – 25 of 32) sorted by relevance

12

/device/google/coral-kernel/sm8150/original-kernel-headers/drm/
Ddrm.h747 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) macro
758 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
759 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
763 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
765 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
766 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
769 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
772 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
775 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
777 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
[all …]
Dmsm_drm.h404 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm…
405 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm…
407 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_m…
410 DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_cfg)
411 #define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
413 #define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
415 #define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + \
417 #define DRM_IOCTL_MSM_POWER_CTRL DRM_IOW((DRM_COMMAND_BASE + \
/device/google/sunfish-kernel/sm7150/kernel-headers/drm/
Ddrm.h426 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE, nr, type) macro
436 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
437 #define DRM_IOCTL_GEM_CLOSE DRM_IOW(0x09, struct drm_gem_close)
441 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW(0x0d, struct drm_set_client_cap)
442 #define DRM_IOCTL_SET_UNIQUE DRM_IOW(0x10, struct drm_unique)
443 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW(0x11, struct drm_auth)
446 #define DRM_IOCTL_CONTROL DRM_IOW(0x14, struct drm_control)
449 #define DRM_IOCTL_MARK_BUFS DRM_IOW(0x17, struct drm_buf_desc)
452 #define DRM_IOCTL_FREE_BUFS DRM_IOW(0x1a, struct drm_buf_free)
453 #define DRM_IOCTL_RM_MAP DRM_IOW(0x1b, struct drm_map)
[all …]
Dmsm_drm.h219 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_…
220 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_…
222 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait…
224 #define DRM_IOCTL_SDE_WB_CONFIG DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_c…
225 #define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_REGISTER_EVENT), struct dr…
226 #define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_DEREGISTER_EVENT), struc…
227 #define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_RMFB2), unsigned int)
228 #define DRM_IOCTL_MSM_POWER_CTRL DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_POWER_CTRL), struct drm_msm_po…
/device/google/coral-kernel/sm8150/kernel-headers/drm/
Ddrm.h426 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE, nr, type) macro
436 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
437 #define DRM_IOCTL_GEM_CLOSE DRM_IOW(0x09, struct drm_gem_close)
441 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW(0x0d, struct drm_set_client_cap)
442 #define DRM_IOCTL_SET_UNIQUE DRM_IOW(0x10, struct drm_unique)
443 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW(0x11, struct drm_auth)
446 #define DRM_IOCTL_CONTROL DRM_IOW(0x14, struct drm_control)
449 #define DRM_IOCTL_MARK_BUFS DRM_IOW(0x17, struct drm_buf_desc)
452 #define DRM_IOCTL_FREE_BUFS DRM_IOW(0x1a, struct drm_buf_free)
453 #define DRM_IOCTL_RM_MAP DRM_IOW(0x1b, struct drm_map)
[all …]
Dmsm_drm.h219 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_…
220 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_…
222 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait…
224 #define DRM_IOCTL_SDE_WB_CONFIG DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_c…
225 #define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_REGISTER_EVENT), struct dr…
226 #define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_DEREGISTER_EVENT), struc…
227 #define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_RMFB2), unsigned int)
228 #define DRM_IOCTL_MSM_POWER_CTRL DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_POWER_CTRL), struct drm_msm_po…
/device/google/sunfish-kernel/sm7150/original-kernel-headers/drm/
Ddrm.h747 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) macro
758 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
759 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
763 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
765 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
766 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
769 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
772 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
775 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
777 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
[all …]
Dmsm_drm.h404 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm…
405 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm…
407 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_m…
410 DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_cfg)
411 #define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
413 #define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
415 #define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + \
417 #define DRM_IOCTL_MSM_POWER_CTRL DRM_IOW((DRM_COMMAND_BASE + \
/device/google/redbull-kernel/sm7250/original-kernel-headers/drm/
Ddrm.h785 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) macro
796 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
797 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
801 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
803 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
804 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
807 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
810 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
813 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
815 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
[all …]
Dmsm_drm.h452 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm…
453 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm…
455 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_m…
458 DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_cfg)
459 #define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
461 #define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + \
463 #define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + \
466 #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u…
467 #define DRM_IOCTL_MSM_POWER_CTRL DRM_IOW((DRM_COMMAND_BASE + \
/device/google/redbull-kernel/sm7250/kernel-headers/drm/
Ddrm.h430 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE, nr, type) macro
440 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
441 #define DRM_IOCTL_GEM_CLOSE DRM_IOW(0x09, struct drm_gem_close)
445 #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW(0x0d, struct drm_set_client_cap)
446 #define DRM_IOCTL_SET_UNIQUE DRM_IOW(0x10, struct drm_unique)
447 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW(0x11, struct drm_auth)
450 #define DRM_IOCTL_CONTROL DRM_IOW(0x14, struct drm_control)
453 #define DRM_IOCTL_MARK_BUFS DRM_IOW(0x17, struct drm_buf_desc)
456 #define DRM_IOCTL_FREE_BUFS DRM_IOW(0x1a, struct drm_buf_free)
457 #define DRM_IOCTL_RM_MAP DRM_IOW(0x1b, struct drm_map)
[all …]
Dmsm_drm.h236 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_…
237 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_…
239 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait…
241 #define DRM_IOCTL_SDE_WB_CONFIG DRM_IOW((DRM_COMMAND_BASE + DRM_SDE_WB_CONFIG), struct sde_drm_wb_c…
242 #define DRM_IOCTL_MSM_REGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_REGISTER_EVENT), struct dr…
243 #define DRM_IOCTL_MSM_DEREGISTER_EVENT DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_DEREGISTER_EVENT), struc…
244 #define DRM_IOCTL_MSM_RMFB2 DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_RMFB2), unsigned int)
246 #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
247 #define DRM_IOCTL_MSM_POWER_CTRL DRM_IOW((DRM_COMMAND_BASE + DRM_MSM_POWER_CTRL), struct drm_msm_po…
/device/google/comet-kernels/6.1/24Q3-12157876/kernel-headers/drm/
Dsamsung_drm.h222 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
223 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
224 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHAN…
225 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANN…
226 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM…
227 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_…
228 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_H…
/device/google/caimito-kernels/6.1/24Q3-12157876/kernel-headers/drm/
Dsamsung_drm.h222 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
223 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
224 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHAN…
225 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANN…
226 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM…
227 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_…
228 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_H…
/device/google/akita-kernels/5.15/24Q3-12065098/kernel-headers/drm/
Dsamsung_drm.h222 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
223 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
224 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHAN…
225 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANN…
226 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM…
227 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_…
228 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_H…
/device/google/comet-kernels/6.1/24Q3-12157876/original-kernel-headers/drm/
Dsamsung_drm.h504 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u32)
506 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
508 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_REQUEST, \
511 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_CANCEL, \
514 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST, \
517 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST, \
520 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL, \
/device/google/shusky-kernels/5.15/24Q3-12065098/kernel-headers/drm/
Dsamsung_drm.h222 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
223 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
224 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHAN…
225 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANN…
226 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM…
227 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_…
228 #define DRM_IOCTL_EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_H…
/device/google/shusky-kernels/5.15/24Q3-12065098/original-kernel-headers/drm/
Dsamsung_drm.h504 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u32)
506 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
508 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_REQUEST, \
511 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_CANCEL, \
514 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST, \
517 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST, \
520 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL, \
/device/google/akita-kernels/5.15/24Q3-12065098/original-kernel-headers/drm/
Dsamsung_drm.h504 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u32)
506 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
508 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_REQUEST, \
511 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_CANCEL, \
514 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST, \
517 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST, \
520 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL, \
/device/google/caimito-kernels/6.1/24Q3-12157876/original-kernel-headers/drm/
Dsamsung_drm.h504 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u32)
506 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
508 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_REQUEST, \
511 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_CANCEL, \
514 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CHANNEL_DATA_REQUEST, \
517 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_REQUEST, \
520 DRM_IOW(DRM_COMMAND_BASE + EXYNOS_CONTEXT_HISTOGRAM_EVENT_CANCEL, \
/device/google/lynx-kernels/5.10/24Q3-12318583/kernel-headers/drm/
Dsamsung_drm.h161 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
162 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
/device/google/pantah-kernels/5.10/24Q3-12318583/original-kernel-headers/drm/
Dsamsung_drm.h345 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + \
347 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + \
/device/google/raviole-kernels/5.10/24Q3-12115410/kernel-headers/drm/
Dsamsung_drm.h161 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
162 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
/device/google/bluejay-kernels/5.10/24Q3-12115410/kernel-headers/drm/
Dsamsung_drm.h161 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u…
162 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32)
/device/google/bluejay-kernels/5.10/24Q3-12115410/original-kernel-headers/drm/
Dsamsung_drm.h345 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + \
347 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + \

12