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Searched refs:Gen (Results 1 – 24 of 24) sorted by relevance

/frameworks/libs/binary_translation/heavy_optimizer/riscv64/
Dfrontend.cc48 Gen<x86_64::CmpqRegReg>(arg1, arg2, GetFlagsRegister()); in CompareAndBranch()
49 Gen<PseudoCondBranch>(ToAssemblerCond(opcode), then_bb, else_bb, GetFlagsRegister()); in CompareAndBranch()
65 Gen<PseudoCopy>(target, src, 8); in BranchRegister()
68 Gen<x86_64::AddqRegImm>(target, offset, GetFlagsRegister()); in BranchRegister()
71 Gen<x86_64::AndqRegImm>(target, ~int32_t{1}, GetFlagsRegister()); in BranchRegister()
94 Gen<x86_64::MovqRegImm>(result, imm); in GetImm()
119 Gen<PseudoJump>(target, kind); in GenJump()
123 Gen<PseudoJump>(target, PseudoJump::Kind::kExitGeneratedCode); in ExitGeneratedCode()
127 Gen<PseudoIndirectJump>(target); in ExitRegionIndirect()
290 Gen<PseudoCopy>(res, arg1, 8); in Op()
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Dfrontend.h75 Gen<PseudoCopy>(result, value, 8); in Copy()
176 Gen<PseudoCopy>(aligned_addr, addr, 8); in Lr()
178 Gen<x86_64::AndqRegImm>(aligned_addr, ~int32_t{sizeof(Reservation) - 1}, GetFlagsRegister()); in Lr()
183 Gen<PseudoCopy>(addr_offset, addr, 8); in Lr()
184 Gen<x86_64::SubqRegReg>(addr_offset, aligned_addr, GetFlagsRegister()); in Lr()
197 Gen<PseudoCopy>(aligned_addr, addr, 8); in Sc()
199 Gen<x86_64::AndqRegImm>(aligned_addr, ~int32_t{sizeof(Reservation) - 1}, GetFlagsRegister()); in Sc()
204 Gen<x86_64::MovqRegMemBaseDisp>(reservation_value, x86_64::kMachineRegRBP, value_offset); in Sc()
206 Gen<PseudoCopy>(addr_offset, addr, 8); in Sc()
207 Gen<x86_64::SubqRegReg>(addr_offset, aligned_addr, GetFlagsRegister()); in Sc()
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Dcall_intrinsic.h44 builder->Gen<x86_64::MovsxbqRegReg>(dst, src); in SignExtend64()
46 builder->Gen<x86_64::MovzxbqRegReg>(dst, src); in SignExtend64()
50 builder->Gen<x86_64::MovsxwqRegReg>(dst, src); in SignExtend64()
52 builder->Gen<x86_64::MovzxwqRegReg>(dst, src); in SignExtend64()
55 builder->Gen<x86_64::MovsxlqRegReg>(dst, src); in SignExtend64()
65 builder->Gen<PseudoCopy>(dst, src, 8); in SignExtend64Result()
84 builder->Gen<x86_64::MovlRegImm>(temp_reg, static_cast<uint32_t>(val)); in GenPrepareCallImmArg()
137 builder->Gen<x86_64::MovdquXRegMemBaseDisp>(first_reg.machine_reg(), result_ptr, 0); in LoadCallIntrinsicResult()
139 builder->Gen<x86_64::MovdquXRegMemBaseDisp>(second_reg.machine_reg(), result_ptr, 16); in LoadCallIntrinsicResult()
141 builder->Gen<x86_64::MovqRegMemBaseDisp>(second_reg, result_ptr, 16); in LoadCallIntrinsicResult()
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Dcall_intrinsic_tests.cc116 builder.Gen<x86_64::MovqRegImm>(result_value_addr_reg, bit_cast<uintptr_t>(result)); in CallOneArgumentIntrinsicUseIntegral()
117 builder.Gen<x86_64::MovqMemBaseDispReg>(result_value_addr_reg, 0, result_register); in CallOneArgumentIntrinsicUseIntegral()
136 builder.Gen<x86_64::MovqRegImm>(argument_register, argument); in CallOneArgumentIntrinsicUseRegister()
140 builder.Gen<x86_64::MovqRegImm>(result_value_addr_reg, bit_cast<uintptr_t>(result)); in CallOneArgumentIntrinsicUseRegister()
141 builder.Gen<x86_64::MovqMemBaseDispReg>(result_value_addr_reg, 0, result_register); in CallOneArgumentIntrinsicUseRegister()
Dinline_intrinsic.h183 builder->Gen<PseudoCopy>(dest, src, src_reg_class.RegSize()); in Mov()
187 builder->Gen<x86_64::VmovdRegXReg>(dest, src); in Mov()
189 builder->Gen<x86_64::MovdRegXReg>(dest, src); in Mov()
194 builder->Gen<x86_64::VmovqRegXReg>(dest, src); in Mov()
196 builder->Gen<x86_64::MovqRegXReg>(dest, src); in Mov()
206 builder->Gen<x86_64::VmovdXRegReg>(dest, src); in Mov()
208 builder->Gen<x86_64::MovdXRegReg>(dest, src); in Mov()
211 builder->Gen<PseudoCopy>(dest, src, 16); in Mov()
219 builder->Gen<x86_64::VmovqXRegReg>(dest, src); in Mov()
221 builder->Gen<x86_64::MovqXRegReg>(dest, src); in Mov()
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/frameworks/libs/binary_translation/backend/x86_64/
Dmachine_ir_test_corpus.cc47 builder.Gen<x86_64::MovqRegImm>(vreg1, 0); in BuildDataFlowAcrossBasicBlocks()
48 builder.Gen<x86_64::MovqRegImm>(vreg2, 0); in BuildDataFlowAcrossBasicBlocks()
49 builder.Gen<PseudoBranch>(bb2); in BuildDataFlowAcrossBasicBlocks()
52 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg2); in BuildDataFlowAcrossBasicBlocks()
53 builder.Gen<PseudoBranch>(bb3); in BuildDataFlowAcrossBasicBlocks()
56 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg1); in BuildDataFlowAcrossBasicBlocks()
57 builder.Gen<PseudoJump>(kNullGuestAddr); in BuildDataFlowAcrossBasicBlocks()
79 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in BuildDataFlowFromTwoPreds()
80 builder.Gen<PseudoBranch>(bb3); in BuildDataFlowFromTwoPreds()
83 builder.Gen<x86_64::MovqRegImm>(vreg, 1); in BuildDataFlowFromTwoPreds()
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Drename_copy_uses_test.cc43 auto* copy_insn = builder.Gen<PseudoCopy>(vreg1, vreg2, 8); in TEST()
44 auto* add_insn = builder.Gen<x86_64::AddqRegReg>(vreg3, vreg1, kMachineRegFLAGS); in TEST()
45 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
77 builder.Gen<PseudoCopy>(vreg1, vreg2, 8); in TEST()
78 auto* add_insn = builder.Gen<x86_64::AddqRegReg>(vreg3, vreg1, kMachineRegFLAGS); in TEST()
79 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
101 builder.Gen<PseudoCopy>(vreg1, vreg2, 8); in TEST()
102 builder.Gen<PseudoCopy>(vreg3, vreg1, 8); in TEST()
103 auto* add_insn = builder.Gen<x86_64::AddqRegReg>(vreg4, vreg3, kMachineRegFLAGS); in TEST()
104 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
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Dmachine_ir_check_test.cc78 builder.Gen<PseudoBranch>(bb2); in TEST()
80 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
99 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
101 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
136 builder.Gen<x86_64::MovqRegImm>(vreg1, 0); in TEST()
137 builder.Gen<x86_64::MovqRegImm>(vreg2, 0); in TEST()
138 builder.Gen<PseudoBranch>(bb2); in TEST()
141 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
192 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
193 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
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Drename_vregs_local_test.cc41 builder.Gen<x86_64::MovqRegImm>(vreg1, 0); in TEST()
42 builder.Gen<x86_64::MovqRegImm>(vreg2, 0); in TEST()
43 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
74 builder.Gen<x86_64::MovqRegReg>(vreg2, MachineReg{4}); in TEST()
75 builder.Gen<x86_64::MovqRegReg>(vreg1, vreg2); in TEST()
76 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
109 builder.Gen<x86_64::MovqRegImm>(vreg1, 4); in TEST()
110 builder.Gen<x86_64::MovqRegImm>(vreg1, 0); in TEST()
111 builder.Gen<x86_64::MovqRegReg>(vreg2, vreg1); in TEST()
112 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
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Dmachine_ir_exec_test.cc130 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, reinterpret_cast<uintptr_t>(&data)); in TEST()
133 builder.Gen<x86_64::MovqRegMemBaseDisp>( in TEST()
135 builder.Gen<x86_64::MovqMemBaseDispReg>( in TEST()
156 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRDI, data); in TEST()
163 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, reinterpret_cast<uintptr_t>(&result)); in TEST()
164 builder.Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, 0, x86_64::kMachineRegRAX); in TEST()
196 builder.Gen<x86_64::MovqRegImm>(data_reg, data); in TEST()
206 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, bit_cast<uintptr_t>(&result)); in TEST()
207 builder.Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, 0, call->IntResultAt(0)); in TEST()
208 builder.Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, 8, call->IntResultAt(1)); in TEST()
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Dinsn_folding_test.cc49 builder.Gen<MovqRegImm>(vreg1, imm); in TryRegRegInsnFolding()
51 builder.Gen<MovlRegImm>(vreg1, imm); in TryRegRegInsnFolding()
53 builder.Gen<InsnTypeRegReg>(vreg2, vreg1, flags); in TryRegRegInsnFolding()
54 builder.Gen<PseudoJump>(kNullGuestAddr); in TryRegRegInsnFolding()
96 builder.Gen<MovqRegImm>(vreg1, imm); in TryMovInsnFolding()
98 builder.Gen<MovlRegImm>(vreg1, imm); in TryMovInsnFolding()
100 builder.Gen<InsnTypeRegReg>(vreg2, vreg1); in TryMovInsnFolding()
101 builder.Gen<PseudoJump>(kNullGuestAddr); in TryMovInsnFolding()
145 builder.Gen<MovqRegImm>(vreg1, 0); in TEST()
146 builder.Gen<MovqRegImm>(vreg2, 0); in TEST()
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Dmachine_ir_opt_test.cc45 builder.Gen<x86_64::MovqRegReg>(vreg1, vreg1); in TEST()
46 builder.Gen<x86_64::MovqRegImm>(vreg1, 1); in TEST()
47 builder.Gen<PseudoBranch>(bb); in TEST()
75 builder.Gen<x86_64::MovqRegImm>(vreg1, 4); in TEST()
76 builder.Gen<x86_64::MovqMemBaseDispReg>(vreg2, 0, vreg1); in TEST()
77 builder.Gen<PseudoBranch>(bb); in TEST()
104 builder.Gen<x86_64::MovqRegImm>(vreg1, 4); in TEST()
105 builder.Gen<PseudoBranch>(bb); in TEST()
133 builder.Gen<x86_64::MovqRegImm>(vreg1, 4); in TEST()
134 builder.Gen<x86_64::MovqRegReg>(vreg2, vreg1); in TEST()
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Dmachine_ir_test.cc38 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, 0); in TEST()
39 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, 0); in TEST()
40 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, 1); in TEST()
41 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, 1); in TEST()
42 builder.Gen<x86_64::MovqRegImm>(x86_64::kMachineRegRBP, 1); in TEST()
43 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
69 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
70 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
71 builder.Gen<PseudoCondBranch>(CodeEmitter::Condition::kZero, bb2, bb3, x86_64::kMachineRegFLAGS); in TEST()
74 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
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Dmachine_ir_analysis_test.cc63 builder.Gen<PseudoBranch>(bb2); in TEST()
66 builder.Gen<PseudoCondBranch>(CodeEmitter::Condition::kZero, bb2, bb3, x86_64::kMachineRegFLAGS); in TEST()
69 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
97 builder.Gen<PseudoBranch>(bb2); in TEST()
100 builder.Gen<PseudoBranch>(bb3); in TEST()
103 builder.Gen<PseudoCondBranch>(CodeEmitter::Condition::kZero, bb2, bb4, x86_64::kMachineRegFLAGS); in TEST()
106 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
137 builder.Gen<PseudoBranch>(bb2); in TEST()
140 builder.Gen<PseudoBranch>(bb3); in TEST()
143 builder.Gen<PseudoCondBranch>(CodeEmitter::Condition::kZero, bb2, bb4, x86_64::kMachineRegFLAGS); in TEST()
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Dloop_guest_context_optimizer_test.cc45 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
70 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
97 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
129 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
157 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
185 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
213 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
241 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
269 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
294 builder.Gen<MovwRegMemBaseDisp>(reg1, kMachineRegRBP, offset); in TEST()
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Dliveness_analyzer_test.cc75 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
76 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
111 builder.Gen<FakeInsnWithDefEarlyClobber>(vreg); in TEST()
112 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
130 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
131 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
132 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
150 builder.Gen<x86_64::MovqRegReg>(vreg, vreg); in TEST()
151 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
170 builder.Gen<x86_64::MovqRegImm>(vreg1, 0); in TEST()
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Dcontext_liveness_analyzer_test.cc62 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
83 builder.Gen<PseudoBranch>(bb2); in TEST()
87 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
110 builder.Gen<PseudoBranch>(bb2); in TEST()
116 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
139 builder.Gen<PseudoCondBranch>(CodeEmitter::Condition::kZero, bb2, bb3, x86_64::kMachineRegFLAGS); in TEST()
144 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
149 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
Dlocal_guest_context_optimizer_test.cc44 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
76 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
106 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
130 builder.Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, offset, reg1); in TEST()
131 builder.Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, offset, reg2); in TEST()
132 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
Drename_vregs_test.cc41 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
42 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
43 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
71 builder.Gen<x86_64::MovqRegImm>(vreg, 0); in TEST()
72 builder.Gen<PseudoBranch>(bb2); in TEST()
75 builder.Gen<x86_64::MovqRegReg>(x86_64::kMachineRegRAX, vreg); in TEST()
76 builder.Gen<PseudoJump>(kNullGuestAddr); in TEST()
/frameworks/libs/binary_translation/backend/include/berberis/backend/x86_64/
Dmachine_ir_builder.h43 /*may_discard*/ InsnType* Gen(Args... args) { in Gen() function
44 return MachineIRBuilderBase::Gen<InsnType, Args...>(args...); in Gen()
48 Gen<x86_64::MovqRegMemBaseDisp>(dst_reg, x86_64::kMachineRegRBP, offset); in GenGet()
52 Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, offset, src_reg); in GenPut()
58 Gen<x86_64::MovsdXRegMemBaseDisp>(dst_reg, x86_64::kMachineRegRBP, offset); in GenGetSimd()
60 Gen<x86_64::MovdqaXRegMemBaseDisp>(dst_reg, x86_64::kMachineRegRBP, offset); in GenGetSimd()
69 Gen<x86_64::MovsdMemBaseDispXReg>(x86_64::kMachineRegRBP, offset, src_reg); in GenSetSimd()
71 Gen<x86_64::MovdqaMemBaseDispXReg>(x86_64::kMachineRegRBP, offset, src_reg); in GenSetSimd()
83 /*may_discard*/ CallImmType* Gen(IntegralType imm) = delete;
111 /*may_discard*/ CallImmArgType* Gen(Args... args) = delete;
Dmachine_insn_intrinsics.h132 &MachineIRBuilder::template Gen<MachineInsn>;
/frameworks/libs/binary_translation/backend/testing/include/x86_64/
Dmem_operand.h103 builder->Gen<typename MachineInsnMemInsns::BaseDisp>( in GenArgsMem()
107 builder->Gen<typename MachineInsnMemInsns::IndexDisp>( in GenArgsMem()
111 builder->Gen<typename MachineInsnMemInsns::BaseIndexDisp>(args..., in GenArgsMem()
126 builder->Gen<typename MachineInsnMemInsns::BaseDisp>( in GenMemArgs()
130 builder->Gen<typename MachineInsnMemInsns::IndexDisp>( in GenMemArgs()
134 builder->Gen<typename MachineInsnMemInsns::BaseIndexDisp>(mem_operand.base(), in GenMemArgs()
/frameworks/libs/binary_translation/backend/include/berberis/backend/common/
Dmachine_ir_builder.h40 /*may_discard*/ InsnType* Gen(Args... args) { in Gen() function
/frameworks/libs/binary_translation/intrinsics/include/berberis/intrinsics/
Dintrinsics_args.h296 builder->template Gen<Instruction>(ArgGetterSetter<MachineIRBuilder, Args>(builder, insn)...); in EmbedAsmInstruction()