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Searched refs:NewInsn (Results 1 – 16 of 16) sorted by relevance

/frameworks/libs/binary_translation/backend/x86_64/
Dinsn_folding.cc80 folded_insn = machine_ir_->NewInsn<AddqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
83 folded_insn = machine_ir_->NewInsn<SubqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
86 folded_insn = machine_ir_->NewInsn<CmpqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
89 folded_insn = machine_ir_->NewInsn<OrqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
92 folded_insn = machine_ir_->NewInsn<XorqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
95 folded_insn = machine_ir_->NewInsn<AndqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
98 folded_insn = machine_ir_->NewInsn<TestqRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
101 folded_insn = machine_ir_->NewInsn<MovlRegImm>(insn->RegAt(0), imm32); in NewImmInsnFromRegInsn()
104 folded_insn = machine_ir_->NewInsn<AddlRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
107 folded_insn = machine_ir_->NewInsn<SublRegImm>(insn->RegAt(0), imm32, insn->RegAt(2)); in NewImmInsnFromRegInsn()
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Dloop_guest_context_optimizer.cc61 auto* new_insn = ir->NewInsn<PseudoCopy>(dst, mem_reg_map[disp].value().reg, copy_size); in ReplaceGetAndUpdateMap()
99 ir->NewInsn<PseudoCopy>(mem_reg_map[disp].value().reg, src, copy_size)); in ReplacePutAndUpdateMap()
124 get_insn = ir->NewInsn<MovqRegMemBaseDisp>(reg_info.reg, kMachineRegRBP, disp); in GenerateGetInsns()
127 get_insn = ir->NewInsn<MovdqaXRegMemBaseDisp>(reg_info.reg, kMachineRegRBP, disp); in GenerateGetInsns()
130 get_insn = ir->NewInsn<MovwRegMemBaseDisp>(reg_info.reg, kMachineRegRBP, disp); in GenerateGetInsns()
133 get_insn = ir->NewInsn<MovsdXRegMemBaseDisp>(reg_info.reg, kMachineRegRBP, disp); in GenerateGetInsns()
159 put_insn = ir->NewInsn<MovqMemBaseDispReg>(kMachineRegRBP, disp, reg_info.reg); in GeneratePutInsns()
162 put_insn = ir->NewInsn<MovdqaMemBaseDispXReg>(kMachineRegRBP, disp, reg_info.reg); in GeneratePutInsns()
165 put_insn = ir->NewInsn<MovwMemBaseDispReg>(kMachineRegRBP, disp, reg_info.reg); in GeneratePutInsns()
168 put_insn = ir->NewInsn<MovsdMemBaseDispXReg>(kMachineRegRBP, disp, reg_info.reg); in GeneratePutInsns()
Drename_vregs_local.cc72 insn_list.insert(insn_it, machine_ir->NewInsn<MovqRegReg>(new_reg, vreg_map.Get(reg))); in TryRenameRegOperand()
117 insn_list.push_front(machine_ir->NewInsn<MovqRegReg>(old_reg, in_reg)); in RenameSuccessorsLiveIns()
Dlocal_guest_context_optimizer.cc75 *insn_it = machine_ir_->NewInsn<PseudoCopy>(dst, mem_reg_map_[disp].value().reg, copy_size); in ReplaceGetAndUpdateMap()
Drename_vregs.cc58 machine_ir->NewInsn<PseudoCopy>(succ_vreg, pred_vreg, vreg_map->GetMaxSize(vreg)); in GenInterBasicBlockMove()
Dmachine_ir_opt.cc161 new_bb->insn_list().push_back(ir->NewInsn<PseudoBranch>(succ_bb)); in InsertNodeOnEdge()
Drename_copy_uses_test.cc180 auto* call_arg_insn = builder.ir()->NewInsn<CallImmArg>(vreg1, CallImm::RegType::kIntType); in TEST()
Dmachine_ir_check_test.cc175 PseudoCopy* insn = machine_ir.NewInsn<PseudoCopy>(reg1, reg2, 8); in TEST()
Dmachine_ir_exec_test.cc50 auto* jump = machine_ir.template NewInsn<PseudoJump>(0); in Init()
/frameworks/libs/binary_translation/backend/include/berberis/backend/x86_64/
Dmachine_ir_builder.h93 auto* call = ir()->NewInsn<CallImm>(imm); in GenCallImm()
125 auto* copy = ir()->NewInsn<PseudoCopy>( in GenCallImmArg()
127 auto* call_arg_insn = ir()->NewInsn<CallImmArg>(renamed_arg_reg, reg_type); in GenCallImmArg()
Dmachine_ir.h317 bb->insn_list().push_back(NewInsn<PseudoBranch>(new_bb)); in SplitBasicBlock()
/frameworks/libs/binary_translation/backend/include/berberis/backend/common/
Dmachine_ir_builder.h41 InsnType* insn = ir_->template NewInsn<InsnType>(args...); in Gen()
Dlifetime.h53 pos_.InsertBefore(machine_ir->NewInsn<PseudoCopy>(reg, spill, size)); in RewriteVReg()
62 pos_.InsertAfter(machine_ir->NewInsn<PseudoCopy>(spill, reg, size)); in RewriteVReg()
Dmachine_ir.h420 [[nodiscard]] T* NewInsn(Args... args) { in NewInsn() function
/frameworks/libs/binary_translation/heavy_optimizer/riscv64/
Dcall_intrinsic_tests.cc44 auto* jump = machine_ir->template NewInsn<PseudoJump>(0); in Init()
Dfrontend.cc225 *jump_it = ir->NewInsn<PseudoBranch>(target_bb); in ReplaceJumpWithBranch()
236 auto* cmpb = ir->NewInsn<x86_64::CmpbMemBaseDispImm>( in ReplaceJumpWithBranch()
239 auto* cond_branch = ir->NewInsn<PseudoCondBranch>( in ReplaceJumpWithBranch()