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Searched refs:ShiftImm32Opcode (Results 1 – 6 of 6) sorted by relevance

/frameworks/libs/binary_translation/lite_translator/riscv64_to_x86_64/
Dlite_translator.cc249 Register LiteTranslator::ShiftImm32(Decoder::ShiftImm32Opcode opcode, Register arg, uint16_t imm) { in ShiftImm32()
250 using ShiftImm32Opcode = Decoder::ShiftImm32Opcode; in ShiftImm32() typedef
254 if (opcode == ShiftImm32Opcode::kSrliw) { in ShiftImm32()
256 } else if (opcode == ShiftImm32Opcode::kSlliw) { in ShiftImm32()
258 } else if (opcode == ShiftImm32Opcode::kSraiw) { in ShiftImm32()
Dlite_translator.h82 Register ShiftImm32(Decoder::ShiftImm32Opcode opcode, Register arg, uint16_t imm);
/frameworks/libs/binary_translation/heavy_optimizer/riscv64/
Dfrontend.cc505 Register HeavyOptimizerFrontend::ShiftImm32(Decoder::ShiftImm32Opcode opcode, in ShiftImm32()
508 using ShiftImm32Opcode = Decoder::ShiftImm32Opcode; in ShiftImm32() typedef
514 case ShiftImm32Opcode::kSlliw: in ShiftImm32()
517 case ShiftImm32Opcode::kSrliw: in ShiftImm32()
520 case ShiftImm32Opcode::kSraiw: in ShiftImm32()
Dfrontend.h94 Register ShiftImm32(Decoder::ShiftImm32Opcode opcode, Register arg, uint16_t imm);
/frameworks/libs/binary_translation/decoder/include/berberis/decoder/riscv64/
Ddecoder.h203 enum class ShiftImm32Opcode : uint16_t { enum
997 using ShiftImm32Args = ShiftImmArgsTemplate<ShiftImm32Opcode>;
1500 DecodeOp<OpImm32Opcode, ShiftImm32Opcode, BitmanipImm32Opcode, 5>(); in DecodeBaseInstruction()
/frameworks/libs/binary_translation/interpreter/riscv64/
Dinterpreter.h316 Register ShiftImm32(Decoder::ShiftImm32Opcode opcode, Register arg, uint16_t imm) { in ShiftImm32()
318 case Decoder::ShiftImm32Opcode::kSlliw: in ShiftImm32()
320 case Decoder::ShiftImm32Opcode::kSrliw: in ShiftImm32()
322 case Decoder::ShiftImm32Opcode::kSraiw: in ShiftImm32()