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Searched refs:Div (Results 1 – 11 of 11) sorted by relevance

/art/test/411-optimizing-arith/src/
DDivTest.java77 $opt$Div(value, 0); in expectDivisionByZero()
90 $opt$Div(value, 0L); in expectDivisionByZero()
110 expectEquals(2, $opt$Div(6, 3)); in divInt()
111 expectEquals(6, $opt$Div(6, 1)); in divInt()
112 expectEquals(-2, $opt$Div(6, -3)); in divInt()
113 expectEquals(1, $opt$Div(4, 3)); in divInt()
114 expectEquals(-1, $opt$Div(4, -3)); in divInt()
115 expectEquals(5, $opt$Div(23, 4)); in divInt()
116 expectEquals(-5, $opt$Div(-23, 4)); in divInt()
118 expectEquals(-Integer.MAX_VALUE, $opt$Div(Integer.MAX_VALUE, -1)); in divInt()
[all …]
/art/test/510-checker-try-catch/smali/
DBuilder.smali44 ## CHECK: <<Div:i\d+>> Div
53 ## CHECK: Phi [<<Div>>,<<Minus1>>,<<Minus2>>,<<Minus3>>]
149 ## CHECK: Div
154 ## CHECK: Div
159 ## CHECK: Div
247 ## CHECK: <<Div:i\d+>> Div
252 ## CHECK: Phi [<<Div>>,<<Minus1>>,<<Minus2>>]
323 ## CHECK: Div
328 ## CHECK: <<Div:i\d+>> Div
333 ## CHECK: Phi [<<Div>>,<<Minus1>>,<<Minus2>>]
[all …]
DSsaBuilder.smali94 ## CHECK-DAG: <<Div1:i\d+>> Div [<<P0>>,<<DZC1>>]
96 ## CHECK-DAG: <<Div2:i\d+>> Div [<<Div1>>,<<DZC2>>]
98 ## CHECK-DAG: <<Div3:i\d+>> Div [<<Div2>>,<<DZC3>>]
139 ## CHECK-DAG: <<Div:i\d+>> Div [<<P0>>,<<DZC>>]
/art/compiler/optimizing/
Dscheduler_arm64.cc72 M(Div , unused) \
Dscheduler_arm.cc83 M(Div, unused) \
Dnodes.h1543 M(Div, BinaryOperation) \
5564 DECLARE_INSTRUCTION(Div);
5567 DEFAULT_COPY_CONSTRUCTOR(Div);
Dcode_generator_riscv64.cc1523 __ Div(out, dividend, tmp); in GenerateDivRemWithAnyConstant() local
1562 __ Div(out, dividend, divisor); in GenerateDivRemIntegral() local
/art/compiler/utils/x86/
Dassembler_x86_test.cc1343 TEST_F(AssemblerX86Test, Div) { in TEST_F() argument
/art/compiler/utils/riscv64/
Dassembler_riscv64_test.cc2762 TEST_F(AssemblerRISCV64Test, Div) { in TEST_F() argument
2763 DriverStr(RepeatRRR(&Riscv64Assembler::Div, "div {reg1}, {reg2}, {reg3}"), "Div"); in TEST_F()
Dassembler_riscv64.h340 void Div(XRegister rd, XRegister rs1, XRegister rs2);
Dassembler_riscv64.cc681 void Riscv64Assembler::Div(XRegister rd, XRegister rs1, XRegister rs2) { in Div() function in art::riscv64::Riscv64Assembler