72 LIR* ArmMir2Lir::LoadFPConstantValue(int r_dest, int value) {  in LoadFPConstantValue()
120 int ArmMir2Lir::ModifiedImmediate(uint32_t value) {  in ModifiedImmediate()
149 bool ArmMir2Lir::InexpensiveConstantInt(int32_t value) {  in InexpensiveConstantInt()
153 bool ArmMir2Lir::InexpensiveConstantFloat(int32_t value) {  in InexpensiveConstantFloat()
157 bool ArmMir2Lir::InexpensiveConstantLong(int64_t value) {  in InexpensiveConstantLong()
161 bool ArmMir2Lir::InexpensiveConstantDouble(int64_t value) {  in InexpensiveConstantDouble()
173 LIR* ArmMir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) {  in LoadConstantNoClobber()
207 LIR* ArmMir2Lir::OpUnconditionalBranch(LIR* target) {  in OpUnconditionalBranch()
213 LIR* ArmMir2Lir::OpCondBranch(ConditionCode cc, LIR* target) {  in OpCondBranch()
223 LIR* ArmMir2Lir::OpReg(OpKind op, RegStorage r_dest_src) {  in OpReg()
238 LIR* ArmMir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,  in OpRegRegShift()
371 LIR* ArmMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {  in OpRegReg()
375 LIR* ArmMir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type) {  in OpMovRegMem()
380 LIR* ArmMir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type) {  in OpMovMemReg()
385 LIR* ArmMir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) {  in OpCondRegReg()
390 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1,  in OpRegRegRegShift()
459 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {  in OpRegRegReg()
463 LIR* ArmMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) {  in OpRegRegImm()
600 LIR* ArmMir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) {  in OpRegImm()
641 LIR* ArmMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {  in LoadConstantWide()
688 int ArmMir2Lir::EncodeShift(int code, int amount) {  in EncodeShift()
692 LIR* ArmMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest,  in LoadBaseIndexed()
758 LIR* ArmMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src,  in StoreBaseIndexed()
824 LIR* ArmMir2Lir::LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base,  in LoadStoreUsingInsnWithOffsetImm8Shl2()
854 LIR* ArmMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadBaseDispBody()
965 LIR* ArmMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadBaseDisp()
995 LIR* ArmMir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src,  in StoreBaseDispBody()
1087 LIR* ArmMir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src,  in StoreBaseDisp()
1141 LIR* ArmMir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) {  in OpFpRegCopy()
1161 LIR* ArmMir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) {  in OpMem()
1166 LIR* ArmMir2Lir::InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) {  in InvokeTrampoline()
1170 size_t ArmMir2Lir::GetInstructionOffset(LIR* lir) {  in GetInstructionOffset()