Lines Matching refs:entry
543 static bool HasModrm(const X86EncodingMap* entry) { in HasModrm() argument
544 switch (entry->kind) { in HasModrm()
551 static bool HasSib(const X86EncodingMap* entry) { in HasSib() argument
552 switch (entry->kind) { in HasSib()
562 switch (entry->opcode) { in HasSib()
567 switch (entry->opcode) { in HasSib()
575 static bool ModrmIsRegReg(const X86EncodingMap* entry) { in ModrmIsRegReg() argument
576 switch (entry->kind) { in ModrmIsRegReg()
595 switch (entry->opcode) { in ModrmIsRegReg()
600 switch (entry->opcode) { in ModrmIsRegReg()
608 static bool IsByteSecondOperand(const X86EncodingMap* entry) { in IsByteSecondOperand() argument
609 return StartsWith(entry->name, "Movzx8") || StartsWith(entry->name, "Movsx8"); in IsByteSecondOperand()
612 size_t X86Mir2Lir::ComputeSize(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_index, in ComputeSize() argument
614 bool has_modrm = HasModrm(entry); in ComputeSize()
615 bool has_sib = HasSib(entry); in ComputeSize()
616 bool r8_form = entry->skeleton.r8_form; in ComputeSize()
617 bool modrm_is_reg_reg = ModrmIsRegReg(entry); in ComputeSize()
622 if (entry->skeleton.prefix1 > 0) { in ComputeSize()
624 if (entry->skeleton.prefix2 > 0) { in ComputeSize()
633 (RegStorage::RegNum(raw_reg) >= 4 && !IsByteSecondOperand(entry)); in ComputeSize()
639 << RegStorage::RegNum(raw_reg) << " with instruction " << entry->name; in ComputeSize()
640 if (entry->skeleton.prefix1 != REX_W && entry->skeleton.prefix2 != REX_W in ComputeSize()
641 && entry->skeleton.prefix1 != REX && entry->skeleton.prefix2 != REX) { in ComputeSize()
647 if (entry->skeleton.opcode == 0x0F) { in ComputeSize()
649 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode1 == 0x3A) { in ComputeSize()
658 || (cu_->target64 && entry->skeleton.prefix1 == THREAD_PREFIX)) { in ComputeSize()
665 if (entry->opcode != kX86Lea32RA && entry->opcode != kX86Lea64RA) { in ComputeSize()
666 DCHECK_NE(entry->flags & (IS_LOAD | IS_STORE), UINT64_C(0)) << entry->name; in ComputeSize()
671 size += entry->skeleton.immediate_bytes; in ComputeSize()
677 const X86EncodingMap* entry = &X86Mir2Lir::EncodingMap[lir->opcode]; in GetInsnSize() local
678 DCHECK_EQ(entry->opcode, lir->opcode) << entry->name; in GetInsnSize()
680 switch (entry->kind) { in GetInsnSize()
686 return ComputeSize(entry, NO_REG, NO_REG, NO_REG, 0); in GetInsnSize()
688 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], 0); in GetInsnSize()
690 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], 0); in GetInsnSize()
692 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
694 return ComputeSize(entry, NO_REG, lir->operands[1], lir->operands[0], lir->operands[3]); in GetInsnSize()
696 return ComputeSize(entry, lir->operands[2], NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
698 return ComputeSize(entry, lir->operands[2], NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
700 return ComputeSize(entry, lir->operands[4], lir->operands[1], lir->operands[0], in GetInsnSize()
704 return ComputeSize(entry, lir->operands[1], NO_REG, NO_REG, 0x12345678); in GetInsnSize()
706 return ComputeSize(entry, lir->operands[0], NO_REG, lir->operands[1], 0); in GetInsnSize()
708 return ComputeSize(entry, lir->operands[1], NO_REG, lir->operands[0], 0); in GetInsnSize()
710 return ComputeSize(entry, lir->operands[0], NO_REG, lir->operands[1], lir->operands[2]); in GetInsnSize()
712 return ComputeSize(entry, lir->operands[0], lir->operands[2], lir->operands[1], in GetInsnSize()
716 return ComputeSize(entry, lir->operands[0], NO_REG, NO_REG, 0x12345678); in GetInsnSize()
718 size_t size = ComputeSize(entry, lir->operands[0], NO_REG, NO_REG, 0); in GetInsnSize()
720 if (entry->skeleton.ax_opcode == 0) { in GetInsnSize()
727 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
729 return ComputeSize(entry, NO_REG, lir->operands[1], lir->operands[0], lir->operands[3]); in GetInsnSize()
732 return ComputeSize(entry, NO_REG, NO_REG, NO_REG, 0x12345678); in GetInsnSize()
735 return ComputeSize(entry, lir->operands[0], lir->operands[1], NO_REG, 0); in GetInsnSize()
738 return ComputeSize(entry, lir->operands[1], lir->operands[0], NO_REG, 0); in GetInsnSize()
740 return ComputeSize(entry, lir->operands[0], NO_REG, lir->operands[1], lir->operands[2]); in GetInsnSize()
742 return ComputeSize(entry, lir->operands[0], lir->operands[2], lir->operands[1], in GetInsnSize()
746 return ((entry->skeleton.prefix1 != 0 || NeedsRex(lir->operands[0])) ? 1 : 0) + 1 + in GetInsnSize()
747 entry->skeleton.immediate_bytes; in GetInsnSize()
750 return ComputeSize(entry, lir->operands[0], NO_REG, NO_REG, 0) - in GetInsnSize()
754 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], lir->operands[1]) - in GetInsnSize()
758 return ComputeSize(entry, NO_REG, lir->operands[1], lir->operands[0], lir->operands[3]) - in GetInsnSize()
763 return ComputeSize(entry, lir->operands[0], NO_REG, NO_REG, 0); in GetInsnSize()
766 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
769 return ComputeSize(entry, lir->operands[4], lir->operands[1], lir->operands[0], in GetInsnSize()
772 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], 0); in GetInsnSize()
774 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
776 DCHECK_EQ(false, entry->skeleton.r8_form); in GetInsnSize()
777 return ComputeSize(entry, NO_REG, lir->operands[1], lir->operands[0], lir->operands[3]); in GetInsnSize()
779 DCHECK_EQ(false, entry->skeleton.r8_form); in GetInsnSize()
780 return ComputeSize(entry, lir->operands[0], NO_REG, lir->operands[1], 0); in GetInsnSize()
782 DCHECK_EQ(false, entry->skeleton.r8_form); in GetInsnSize()
783 return ComputeSize(entry, lir->operands[0], NO_REG, lir->operands[1], lir->operands[2]); in GetInsnSize()
798 return ComputeSize(entry, NO_REG, NO_REG, NO_REG, 0x12345678); in GetInsnSize()
812 return ComputeSize(entry, NO_REG, NO_REG, lir->operands[0], lir->operands[1]); in GetInsnSize()
814 return ComputeSize(entry, NO_REG, lir->operands[1], lir->operands[0], lir->operands[3]); in GetInsnSize()
817 return ComputeSize(entry, NO_REG, NO_REG, NO_REG, 0x12345678); in GetInsnSize()
823 if (entry->opcode == kX86PcRelLoadRA) { in GetInsnSize()
826 return ComputeSize(entry, lir->operands[0], lir->operands[2], lir->operands[1], in GetInsnSize()
829 DCHECK_EQ(entry->opcode, kX86PcRelAdr); in GetInsnSize()
842 UNIMPLEMENTED(FATAL) << "Unimplemented size encoding for: " << entry->name; in GetInsnSize()
857 void X86Mir2Lir::CheckValidByteRegister(const X86EncodingMap* entry, int32_t raw_reg) { in CheckValidByteRegister() argument
860 if (entry->skeleton.r8_form) { in CheckValidByteRegister()
861 CHECK(strchr(entry->name, '8') != nullptr) << entry->name; in CheckValidByteRegister()
863 if (entry->skeleton.immediate_bytes != 1) { // Ignore ...I8 instructions. in CheckValidByteRegister()
864 if (!StartsWith(entry->name, "Movzx8") && !StartsWith(entry->name, "Movsx8") in CheckValidByteRegister()
865 && !StartsWith(entry->name, "Movzx8q") && !StartsWith(entry->name, "Movsx8q")) { in CheckValidByteRegister()
866 CHECK(strchr(entry->name, '8') == nullptr) << entry->name; in CheckValidByteRegister()
872 CHECK(cu_->target64 || !entry->skeleton.r8_form) in CheckValidByteRegister()
874 << " for instruction " << entry->name << " in " in CheckValidByteRegister()
880 void X86Mir2Lir::EmitPrefix(const X86EncodingMap* entry, in EmitPrefix() argument
887 bool w = (entry->skeleton.prefix1 == REX_W) || (entry->skeleton.prefix2 == REX_W); in EmitPrefix()
891 bool r8_form = entry->skeleton.r8_form; in EmitPrefix()
892 bool modrm_is_reg_reg = ModrmIsRegReg(entry); in EmitPrefix()
897 if (RegStorage::RegNum(raw_reg_r) >= 4 && !IsByteSecondOperand(entry)) { in EmitPrefix()
915 if (entry->skeleton.prefix1 != 0) { in EmitPrefix()
916 if (cu_->target64 && entry->skeleton.prefix1 == THREAD_PREFIX) { in EmitPrefix()
920 if (entry->skeleton.prefix1 == REX_W || entry->skeleton.prefix1 == REX) { in EmitPrefix()
922 rex |= entry->skeleton.prefix1; in EmitPrefix()
926 code_buffer_.push_back(entry->skeleton.prefix1); in EmitPrefix()
929 if (entry->skeleton.prefix2 != 0) { in EmitPrefix()
930 if (entry->skeleton.prefix2 == REX_W || entry->skeleton.prefix1 == REX) { in EmitPrefix()
932 rex |= entry->skeleton.prefix2; in EmitPrefix()
936 code_buffer_.push_back(entry->skeleton.prefix2); in EmitPrefix()
940 DCHECK_EQ(0, entry->skeleton.prefix2); in EmitPrefix()
948 void X86Mir2Lir::EmitOpcode(const X86EncodingMap* entry) { in EmitOpcode() argument
949 code_buffer_.push_back(entry->skeleton.opcode); in EmitOpcode()
950 if (entry->skeleton.opcode == 0x0F) { in EmitOpcode()
951 code_buffer_.push_back(entry->skeleton.extra_opcode1); in EmitOpcode()
952 if (entry->skeleton.extra_opcode1 == 0x38 || entry->skeleton.extra_opcode1 == 0x3A) { in EmitOpcode()
953 code_buffer_.push_back(entry->skeleton.extra_opcode2); in EmitOpcode()
955 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitOpcode()
958 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitOpcode()
959 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitOpcode()
963 void X86Mir2Lir::EmitPrefixAndOpcode(const X86EncodingMap* entry, in EmitPrefixAndOpcode() argument
965 EmitPrefix(entry, raw_reg_r, raw_reg_x, raw_reg_b); in EmitPrefixAndOpcode()
966 EmitOpcode(entry); in EmitPrefixAndOpcode()
1022 void X86Mir2Lir::EmitImm(const X86EncodingMap* entry, int64_t imm) { in EmitImm() argument
1023 switch (entry->skeleton.immediate_bytes) { in EmitImm()
1051 LOG(FATAL) << "Unexpected immediate bytes (" << entry->skeleton.immediate_bytes in EmitImm()
1052 << ") for instruction: " << entry->name; in EmitImm()
1057 void X86Mir2Lir::EmitNullary(const X86EncodingMap* entry) { in EmitNullary() argument
1058 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitNullary()
1059 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, NO_REG); in EmitNullary()
1060 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitNullary()
1061 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitNullary()
1062 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitNullary()
1065 void X86Mir2Lir::EmitOpRegOpcode(const X86EncodingMap* entry, int32_t raw_reg) { in EmitOpRegOpcode() argument
1066 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitOpRegOpcode()
1067 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, raw_reg); in EmitOpRegOpcode()
1069 DCHECK(entry->skeleton.opcode != 0x0F || in EmitOpRegOpcode()
1070 (entry->skeleton.extra_opcode1 != 0x38 && entry->skeleton.extra_opcode1 != 0x3A)); in EmitOpRegOpcode()
1074 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitOpRegOpcode()
1075 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitOpRegOpcode()
1078 void X86Mir2Lir::EmitOpReg(const X86EncodingMap* entry, int32_t raw_reg) { in EmitOpReg() argument
1079 CheckValidByteRegister(entry, raw_reg); in EmitOpReg()
1080 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, raw_reg); in EmitOpReg()
1082 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitOpReg()
1084 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitOpReg()
1085 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitOpReg()
1088 void X86Mir2Lir::EmitOpMem(const X86EncodingMap* entry, int32_t raw_base, int32_t disp) { in EmitOpMem() argument
1089 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitOpMem()
1090 EmitPrefix(entry, NO_REG, NO_REG, raw_base); in EmitOpMem()
1091 code_buffer_.push_back(entry->skeleton.opcode); in EmitOpMem()
1092 DCHECK_NE(0x0F, entry->skeleton.opcode); in EmitOpMem()
1093 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitOpMem()
1094 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitOpMem()
1096 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitOpMem()
1097 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitOpMem()
1098 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitOpMem()
1101 void X86Mir2Lir::EmitOpArray(const X86EncodingMap* entry, int32_t raw_base, int32_t raw_index, in EmitOpArray() argument
1103 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitOpArray()
1104 EmitPrefixAndOpcode(entry, NO_REG, raw_index, raw_base); in EmitOpArray()
1107 EmitModrmSibDisp(entry->skeleton.modrm_opcode, low_base, low_index, scale, disp); in EmitOpArray()
1108 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitOpArray()
1109 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitOpArray()
1112 void X86Mir2Lir::EmitMemReg(const X86EncodingMap* entry, int32_t raw_base, int32_t disp, in EmitMemReg() argument
1114 CheckValidByteRegister(entry, raw_reg); in EmitMemReg()
1115 EmitPrefixAndOpcode(entry, raw_reg, NO_REG, raw_base); in EmitMemReg()
1119 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitMemReg()
1120 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitMemReg()
1121 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitMemReg()
1124 void X86Mir2Lir::EmitRegMem(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base, in EmitRegMem() argument
1127 EmitMemReg(entry, raw_base, disp, raw_reg); in EmitRegMem()
1130 void X86Mir2Lir::EmitRegArray(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base, in EmitRegArray() argument
1132 CheckValidByteRegister(entry, raw_reg); in EmitRegArray()
1133 EmitPrefixAndOpcode(entry, raw_reg, raw_index, raw_base); in EmitRegArray()
1138 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegArray()
1139 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitRegArray()
1140 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitRegArray()
1143 void X86Mir2Lir::EmitArrayReg(const X86EncodingMap* entry, int32_t raw_base, int32_t raw_index, in EmitArrayReg() argument
1146 EmitRegArray(entry, raw_reg, raw_base, raw_index, scale, disp); in EmitArrayReg()
1149 void X86Mir2Lir::EmitMemImm(const X86EncodingMap* entry, int32_t raw_base, int32_t disp, in EmitMemImm() argument
1151 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitMemImm()
1152 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, raw_base); in EmitMemImm()
1154 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitMemImm()
1155 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitMemImm()
1156 EmitImm(entry, imm); in EmitMemImm()
1159 void X86Mir2Lir::EmitArrayImm(const X86EncodingMap* entry, in EmitArrayImm() argument
1162 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitArrayImm()
1163 EmitPrefixAndOpcode(entry, NO_REG, raw_index, raw_base); in EmitArrayImm()
1166 EmitModrmSibDisp(entry->skeleton.modrm_opcode, low_base, low_index, scale, disp); in EmitArrayImm()
1167 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitArrayImm()
1168 EmitImm(entry, imm); in EmitArrayImm()
1171 void X86Mir2Lir::EmitRegThread(const X86EncodingMap* entry, int32_t raw_reg, int32_t disp) { in EmitRegThread() argument
1172 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitRegThread()
1173 DCHECK_NE(entry->skeleton.prefix1, 0); in EmitRegThread()
1174 EmitPrefixAndOpcode(entry, raw_reg, NO_REG, NO_REG); in EmitRegThread()
1181 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegThread()
1182 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitRegThread()
1183 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitRegThread()
1186 void X86Mir2Lir::EmitRegReg(const X86EncodingMap* entry, int32_t raw_reg1, int32_t raw_reg2) { in EmitRegReg() argument
1187 if (!IsByteSecondOperand(entry)) { in EmitRegReg()
1188 CheckValidByteRegister(entry, raw_reg1); in EmitRegReg()
1190 CheckValidByteRegister(entry, raw_reg2); in EmitRegReg()
1191 EmitPrefixAndOpcode(entry, raw_reg1, NO_REG, raw_reg2); in EmitRegReg()
1196 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegReg()
1197 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitRegReg()
1198 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitRegReg()
1201 void X86Mir2Lir::EmitRegRegImm(const X86EncodingMap* entry, int32_t raw_reg1, int32_t raw_reg2, in EmitRegRegImm() argument
1203 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitRegRegImm()
1204 EmitPrefixAndOpcode(entry, raw_reg1, NO_REG, raw_reg2); in EmitRegRegImm()
1209 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegRegImm()
1210 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitRegRegImm()
1211 EmitImm(entry, imm); in EmitRegRegImm()
1214 void X86Mir2Lir::EmitRegMemImm(const X86EncodingMap* entry, in EmitRegMemImm() argument
1217 CheckValidByteRegister(entry, raw_reg); in EmitRegMemImm()
1218 EmitPrefixAndOpcode(entry, raw_reg, NO_REG, raw_base); in EmitRegMemImm()
1222 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegMemImm()
1223 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitRegMemImm()
1224 EmitImm(entry, imm); in EmitRegMemImm()
1227 void X86Mir2Lir::EmitMemRegImm(const X86EncodingMap* entry, in EmitMemRegImm() argument
1230 EmitRegMemImm(entry, raw_reg, raw_base, disp, imm); in EmitMemRegImm()
1233 void X86Mir2Lir::EmitRegImm(const X86EncodingMap* entry, int32_t raw_reg, int32_t imm) { in EmitRegImm() argument
1234 CheckValidByteRegister(entry, raw_reg); in EmitRegImm()
1235 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitRegImm()
1236 if (RegStorage::RegNum(raw_reg) == rs_rAX.GetRegNum() && entry->skeleton.ax_opcode != 0) { in EmitRegImm()
1237 code_buffer_.push_back(entry->skeleton.ax_opcode); in EmitRegImm()
1240 EmitOpcode(entry); in EmitRegImm()
1241 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitRegImm()
1244 EmitImm(entry, imm); in EmitRegImm()
1247 void X86Mir2Lir::EmitThreadImm(const X86EncodingMap* entry, int32_t disp, int32_t imm) { in EmitThreadImm() argument
1248 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitThreadImm()
1249 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, NO_REG); in EmitThreadImm()
1250 EmitModrmThread(entry->skeleton.modrm_opcode); in EmitThreadImm()
1255 EmitImm(entry, imm); in EmitThreadImm()
1256 DCHECK_EQ(entry->skeleton.ax_opcode, 0); in EmitThreadImm()
1259 void X86Mir2Lir::EmitMovRegImm(const X86EncodingMap* entry, int32_t raw_reg, int64_t imm) { in EmitMovRegImm() argument
1260 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitMovRegImm()
1261 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitMovRegImm()
1264 switch (entry->skeleton.immediate_bytes) { in EmitMovRegImm()
1283 << static_cast<uint32_t>(entry->skeleton.immediate_bytes); in EmitMovRegImm()
1287 void X86Mir2Lir::EmitShiftRegImm(const X86EncodingMap* entry, int32_t raw_reg, int32_t imm) { in EmitShiftRegImm() argument
1288 CheckValidByteRegister(entry, raw_reg); in EmitShiftRegImm()
1289 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitShiftRegImm()
1291 code_buffer_.push_back(entry->skeleton.opcode); in EmitShiftRegImm()
1294 code_buffer_.push_back(entry->skeleton.ax_opcode); in EmitShiftRegImm()
1296 DCHECK_NE(0x0F, entry->skeleton.opcode); in EmitShiftRegImm()
1297 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitShiftRegImm()
1298 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitShiftRegImm()
1300 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitShiftRegImm()
1303 DCHECK_EQ(entry->skeleton.immediate_bytes, 1); in EmitShiftRegImm()
1309 void X86Mir2Lir::EmitShiftRegCl(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_cl) { in EmitShiftRegCl() argument
1310 CheckValidByteRegister(entry, raw_reg); in EmitShiftRegCl()
1312 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitShiftRegCl()
1313 code_buffer_.push_back(entry->skeleton.opcode); in EmitShiftRegCl()
1314 DCHECK_NE(0x0F, entry->skeleton.opcode); in EmitShiftRegCl()
1315 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitShiftRegCl()
1316 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitShiftRegCl()
1318 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitShiftRegCl()
1320 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitShiftRegCl()
1321 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitShiftRegCl()
1324 void X86Mir2Lir::EmitShiftMemCl(const X86EncodingMap* entry, int32_t raw_base, in EmitShiftMemCl() argument
1326 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitShiftMemCl()
1328 EmitPrefix(entry, NO_REG, NO_REG, raw_base); in EmitShiftMemCl()
1329 code_buffer_.push_back(entry->skeleton.opcode); in EmitShiftMemCl()
1330 DCHECK_NE(0x0F, entry->skeleton.opcode); in EmitShiftMemCl()
1331 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitShiftMemCl()
1332 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitShiftMemCl()
1334 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, displacement); in EmitShiftMemCl()
1335 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitShiftMemCl()
1336 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitShiftMemCl()
1339 void X86Mir2Lir::EmitShiftMemImm(const X86EncodingMap* entry, int32_t raw_base, int32_t disp, in EmitShiftMemImm() argument
1341 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitShiftMemImm()
1342 EmitPrefix(entry, NO_REG, NO_REG, raw_base); in EmitShiftMemImm()
1344 code_buffer_.push_back(entry->skeleton.opcode); in EmitShiftMemImm()
1347 code_buffer_.push_back(entry->skeleton.ax_opcode); in EmitShiftMemImm()
1349 DCHECK_NE(0x0F, entry->skeleton.opcode); in EmitShiftMemImm()
1350 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitShiftMemImm()
1351 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitShiftMemImm()
1353 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitShiftMemImm()
1355 DCHECK_EQ(entry->skeleton.immediate_bytes, 1); in EmitShiftMemImm()
1361 void X86Mir2Lir::EmitRegCond(const X86EncodingMap* entry, int32_t raw_reg, int32_t cc) { in EmitRegCond() argument
1362 CheckValidByteRegister(entry, raw_reg); in EmitRegCond()
1363 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitRegCond()
1364 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitRegCond()
1365 DCHECK_EQ(0x0F, entry->skeleton.opcode); in EmitRegCond()
1367 DCHECK_EQ(0x90, entry->skeleton.extra_opcode1); in EmitRegCond()
1371 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitRegCond()
1373 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitRegCond()
1375 DCHECK_EQ(entry->skeleton.immediate_bytes, 0); in EmitRegCond()
1378 void X86Mir2Lir::EmitMemCond(const X86EncodingMap* entry, int32_t raw_base, int32_t disp, in EmitMemCond() argument
1380 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitMemCond()
1381 if (entry->skeleton.prefix1 != 0) { in EmitMemCond()
1382 code_buffer_.push_back(entry->skeleton.prefix1); in EmitMemCond()
1383 if (entry->skeleton.prefix2 != 0) { in EmitMemCond()
1384 code_buffer_.push_back(entry->skeleton.prefix2); in EmitMemCond()
1387 DCHECK_EQ(0, entry->skeleton.prefix2); in EmitMemCond()
1389 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitMemCond()
1390 DCHECK_EQ(0x0F, entry->skeleton.opcode); in EmitMemCond()
1392 DCHECK_EQ(0x90, entry->skeleton.extra_opcode1); in EmitMemCond()
1396 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitMemCond()
1398 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitMemCond()
1399 DCHECK_EQ(entry->skeleton.immediate_bytes, 0); in EmitMemCond()
1402 void X86Mir2Lir::EmitRegRegCond(const X86EncodingMap* entry, int32_t raw_reg1, int32_t raw_reg2, in EmitRegRegCond() argument
1405 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitRegRegCond()
1406 EmitPrefixAndOpcode(entry, raw_reg1, NO_REG, raw_reg2); in EmitRegRegCond()
1415 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitRegRegCond()
1416 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegRegCond()
1428 void X86Mir2Lir::EmitRegMemCond(const X86EncodingMap* entry, int32_t raw_reg1, int32_t raw_base, in EmitRegMemCond() argument
1431 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitRegMemCond()
1432 EmitPrefixAndOpcode(entry, raw_reg1, NO_REG, raw_base); in EmitRegMemCond()
1441 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitRegMemCond()
1442 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegMemCond()
1449 void X86Mir2Lir::EmitJmp(const X86EncodingMap* entry, int32_t rel) { in EmitJmp() argument
1450 if (entry->opcode == kX86Jmp8) { in EmitJmp()
1454 } else if (entry->opcode == kX86Jmp32) { in EmitJmp()
1460 } else if (entry->opcode == kX86Jecxz8) { in EmitJmp()
1465 DCHECK(entry->opcode == kX86JmpR); in EmitJmp()
1466 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitJmp()
1467 EmitPrefix(entry, NO_REG, NO_REG, rel); in EmitJmp()
1468 code_buffer_.push_back(entry->skeleton.opcode); in EmitJmp()
1470 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitJmp()
1475 void X86Mir2Lir::EmitJcc(const X86EncodingMap* entry, int32_t rel, int32_t cc) { in EmitJcc() argument
1478 if (entry->opcode == kX86Jcc8) { in EmitJcc()
1483 DCHECK(entry->opcode == kX86Jcc32); in EmitJcc()
1493 void X86Mir2Lir::EmitCallMem(const X86EncodingMap* entry, int32_t raw_base, int32_t disp) { in EmitCallMem() argument
1494 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitCallMem()
1495 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, raw_base); in EmitCallMem()
1497 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitCallMem()
1498 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitCallMem()
1499 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitCallMem()
1502 void X86Mir2Lir::EmitCallImmediate(const X86EncodingMap* entry, int32_t disp) { in EmitCallImmediate() argument
1503 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitCallImmediate()
1504 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, NO_REG); in EmitCallImmediate()
1505 DCHECK_EQ(4, entry->skeleton.immediate_bytes); in EmitCallImmediate()
1510 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitCallImmediate()
1513 void X86Mir2Lir::EmitCallThread(const X86EncodingMap* entry, int32_t disp) { in EmitCallThread() argument
1514 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitCallThread()
1515 DCHECK_NE(entry->skeleton.prefix1, 0); in EmitCallThread()
1516 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, NO_REG); in EmitCallThread()
1517 EmitModrmThread(entry->skeleton.modrm_opcode); in EmitCallThread()
1522 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitCallThread()
1523 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitCallThread()
1526 void X86Mir2Lir::EmitPcRel(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base_or_table, in EmitPcRel() argument
1529 if (entry->opcode == kX86PcRelLoadRA) { in EmitPcRel()
1534 DCHECK(entry->opcode == kX86PcRelAdr); in EmitPcRel()
1539 if (entry->opcode == kX86PcRelLoadRA) { in EmitPcRel()
1540 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitPcRel()
1541 EmitPrefix(entry, raw_reg, raw_index, raw_base_or_table); in EmitPcRel()
1542 code_buffer_.push_back(entry->skeleton.opcode); in EmitPcRel()
1543 DCHECK_NE(0x0F, entry->skeleton.opcode); in EmitPcRel()
1544 DCHECK_EQ(0, entry->skeleton.extra_opcode1); in EmitPcRel()
1545 DCHECK_EQ(0, entry->skeleton.extra_opcode2); in EmitPcRel()
1554 DCHECK_EQ(0, entry->skeleton.immediate_bytes); in EmitPcRel()
1557 code_buffer_.push_back(entry->skeleton.opcode + low_reg); in EmitPcRel()
1563 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitPcRel()
1564 DCHECK_EQ(0, entry->skeleton.ax_opcode); in EmitPcRel()
1567 void X86Mir2Lir::EmitMacro(const X86EncodingMap* entry, int32_t raw_reg, int32_t offset) { in EmitMacro() argument
1568 DCHECK_EQ(entry->opcode, kX86StartOfMethod) << entry->name; in EmitMacro()
1569 DCHECK_EQ(false, entry->skeleton.r8_form); in EmitMacro()
1570 EmitPrefix(entry, raw_reg, NO_REG, NO_REG); in EmitMacro()
1584 void X86Mir2Lir::EmitUnimplemented(const X86EncodingMap* entry, LIR* lir) { in EmitUnimplemented() argument
1585 UNIMPLEMENTED(WARNING) << "encoding kind for " << entry->name << " " in EmitUnimplemented()
1586 << BuildInsnString(entry->fmt, lir, 0); in EmitUnimplemented()
1740 const X86EncodingMap *entry = &X86Mir2Lir::EncodingMap[lir->opcode]; in AssembleInstructions() local
1742 switch (entry->kind) { in AssembleInstructions()
1747 EmitNullary(entry); in AssembleInstructions()
1750 EmitOpRegOpcode(entry, lir->operands[0]); in AssembleInstructions()
1753 EmitOpReg(entry, lir->operands[0]); in AssembleInstructions()
1756 EmitOpMem(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1759 EmitOpArray(entry, lir->operands[0], lir->operands[1], lir->operands[2], lir->operands[3]); in AssembleInstructions()
1762 EmitMemReg(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1765 EmitMemImm(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1768 EmitArrayImm(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1772 EmitArrayReg(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1776 EmitRegMem(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1779 EmitRegArray(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1783 EmitRegThread(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1786 EmitRegReg(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1789 EmitRegReg(entry, lir->operands[1], lir->operands[0]); in AssembleInstructions()
1792 EmitMemRegImm(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1796 EmitRegRegImm(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1799 EmitRegRegImm(entry, lir->operands[1], lir->operands[0], lir->operands[2]); in AssembleInstructions()
1802 EmitRegMemImm(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1806 EmitRegImm(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1809 EmitThreadImm(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1812 EmitMovRegImm(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1817 EmitMovRegImm(entry, lir->operands[0], value); in AssembleInstructions()
1821 EmitShiftRegImm(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1824 EmitShiftMemImm(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1827 EmitShiftRegCl(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1830 EmitShiftMemCl(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1833 EmitRegCond(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1836 EmitMemCond(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1839 EmitRegRegCond(entry, lir->operands[0], lir->operands[1], lir->operands[2]); in AssembleInstructions()
1842 EmitRegMemCond(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1846 if (entry->opcode == kX86JmpT) { in AssembleInstructions()
1849 EmitCallThread(entry, lir->operands[0]); in AssembleInstructions()
1851 EmitJmp(entry, lir->operands[0]); in AssembleInstructions()
1855 EmitJcc(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1858 switch (entry->opcode) { in AssembleInstructions()
1860 EmitCallImmediate(entry, lir->operands[0]); in AssembleInstructions()
1863 EmitCallMem(entry, lir->operands[0], lir->operands[1]); in AssembleInstructions()
1866 EmitCallThread(entry, lir->operands[0]); in AssembleInstructions()
1869 EmitUnimplemented(entry, lir); in AssembleInstructions()
1874 EmitPcRel(entry, lir->operands[0], lir->operands[1], lir->operands[2], in AssembleInstructions()
1878 EmitMacro(entry, lir->operands[0], lir->offset); in AssembleInstructions()
1887 EmitUnimplemented(entry, lir); in AssembleInstructions()