Lines Matching refs:modrm_opcode
226 #define SHIFT_ENCODING_MAP(opname, modrm_opcode) \ argument
227 …OP | REG_DEF0_USE0 | SETS_CCODES, { 0, 0, 0xC0, 0, 0, modrm_opcode, 0xD1, 1, true …
228 …Y_OP | REG_USE0 | SETS_CCODES, { 0, 0, 0xC0, 0, 0, modrm_opcode, 0xD1, 1, true …
229 … | REG_USE01 | SETS_CCODES, { 0, 0, 0xC0, 0, 0, modrm_opcode, 0xD1, 1, true …
230 …OP | REG_DEF0_USE0 | REG_USEC | SETS_CCODES, { 0, 0, 0xD2, 0, 0, modrm_opcode, 0, 1, true …
231 …Y_OP | REG_USE0 | REG_USEC | SETS_CCODES, { 0, 0, 0xD2, 0, 0, modrm_opcode, 0, 1, true …
232 … | REG_USE01 | REG_USEC | SETS_CCODES, { 0, 0, 0xD2, 0, 0, modrm_opcode, 0, 1, true …
234 …OP | REG_DEF0_USE0 | SETS_CCODES, { 0x66, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
235 …Y_OP | REG_USE0 | SETS_CCODES, { 0x66, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
236 … | REG_USE01 | SETS_CCODES, { 0x66, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
237 …OP | REG_DEF0_USE0 | REG_USEC | SETS_CCODES, { 0x66, 0, 0xD3, 0, 0, modrm_opcode, 0, 1, false…
238 …Y_OP | REG_USE0 | REG_USEC | SETS_CCODES, { 0x66, 0, 0xD3, 0, 0, modrm_opcode, 0, 1, false…
239 … | REG_USE01 | REG_USEC | SETS_CCODES, { 0x66, 0, 0xD3, 0, 0, modrm_opcode, 0, 1, false…
241 …OP | REG_DEF0_USE0 | SETS_CCODES, { 0, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
242 …Y_OP | REG_USE0 | SETS_CCODES, { 0, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
243 … | REG_USE01 | SETS_CCODES, { 0, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
244 …OP | REG_DEF0_USE0 | REG_USEC | SETS_CCODES, { 0, 0, 0xD3, 0, 0, modrm_opcode, 0, 0, false…
245 …Y_OP | REG_USE0 | REG_USEC | SETS_CCODES, { 0, 0, 0xD3, 0, 0, modrm_opcode, 0, 0, false…
246 … | REG_USE01 | REG_USEC | SETS_CCODES, { 0, 0, 0xD3, 0, 0, modrm_opcode, 0, 0, false…
248 … | REG_DEF0_USE0 | SETS_CCODES, { REX_W, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
249 … | REG_USE0 | SETS_CCODES, { REX_W, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
250 … | REG_USE01 | SETS_CCODES, { REX_W, 0, 0xC1, 0, 0, modrm_opcode, 0xD1, 1, false…
251 … | REG_DEF0_USE0 | REG_USEC | SETS_CCODES, { REX_W, 0, 0xD3, 0, 0, modrm_opcode, 0, 0, false…
252 … | REG_USE0 | REG_USEC | SETS_CCODES, { REX_W, 0, 0xD3, 0, 0, modrm_opcode, 0, 0, false…
253 … | REG_USE01 | REG_USEC | SETS_CCODES, { REX_W, 0, 0xD3, 0, 0, modrm_opcode, 0, 0, false…
1060 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitNullary()
1082 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitOpReg()
1096 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitOpMem()
1107 EmitModrmSibDisp(entry->skeleton.modrm_opcode, low_base, low_index, scale, disp); in EmitOpArray()
1119 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitMemReg()
1138 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegArray()
1154 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitMemImm()
1166 EmitModrmSibDisp(entry->skeleton.modrm_opcode, low_base, low_index, scale, disp); in EmitArrayImm()
1181 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegThread()
1196 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegReg()
1209 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegRegImm()
1222 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegMemImm()
1241 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitRegImm()
1250 EmitModrmThread(entry->skeleton.modrm_opcode); in EmitThreadImm()
1300 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitShiftRegImm()
1318 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitShiftRegCl()
1334 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, displacement); in EmitShiftMemCl()
1353 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitShiftMemImm()
1373 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitRegCond()
1398 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitMemCond()
1416 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegRegCond()
1442 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitRegMemCond()
1470 uint8_t modrm = (3 << 6) | (entry->skeleton.modrm_opcode << 3) | low_reg; in EmitJmp()
1497 EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp); in EmitCallMem()
1517 EmitModrmThread(entry->skeleton.modrm_opcode); in EmitCallThread()
1563 DCHECK_EQ(0, entry->skeleton.modrm_opcode); in EmitPcRel()