Lines Matching refs:raw_reg
533 static bool NeedsRex(int32_t raw_reg) { in NeedsRex() argument
534 return RegStorage::RegNum(raw_reg) > 7; in NeedsRex()
537 static uint8_t LowRegisterBits(int32_t raw_reg) { in LowRegisterBits() argument
538 uint8_t low_reg = RegStorage::RegNum(raw_reg) & kRegNumMask32; // 3 bits in LowRegisterBits()
612 size_t X86Mir2Lir::ComputeSize(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_index, in ComputeSize() argument
629 bool registers_need_rex_prefix = NeedsRex(raw_reg) || NeedsRex(raw_index) || NeedsRex(raw_base); in ComputeSize()
633 (RegStorage::RegNum(raw_reg) >= 4 && !IsByteSecondOperand(entry)); in ComputeSize()
639 << RegStorage::RegNum(raw_reg) << " with instruction " << entry->name; in ComputeSize()
857 void X86Mir2Lir::CheckValidByteRegister(const X86EncodingMap* entry, int32_t raw_reg) { in CheckValidByteRegister() argument
870 if (RegStorage::RegNum(raw_reg) >= 4) { in CheckValidByteRegister()
873 << "Invalid register " << static_cast<int>(RegStorage::RegNum(raw_reg)) in CheckValidByteRegister()
1065 void X86Mir2Lir::EmitOpRegOpcode(const X86EncodingMap* entry, int32_t raw_reg) { in EmitOpRegOpcode() argument
1067 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, raw_reg); in EmitOpRegOpcode()
1071 DCHECK(!RegStorage::IsFloat(raw_reg)); in EmitOpRegOpcode()
1072 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitOpRegOpcode()
1078 void X86Mir2Lir::EmitOpReg(const X86EncodingMap* entry, int32_t raw_reg) { in EmitOpReg() argument
1079 CheckValidByteRegister(entry, raw_reg); in EmitOpReg()
1080 EmitPrefixAndOpcode(entry, NO_REG, NO_REG, raw_reg); in EmitOpReg()
1081 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitOpReg()
1113 int32_t raw_reg) { in EmitMemReg() argument
1114 CheckValidByteRegister(entry, raw_reg); in EmitMemReg()
1115 EmitPrefixAndOpcode(entry, raw_reg, NO_REG, raw_base); in EmitMemReg()
1116 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitMemReg()
1124 void X86Mir2Lir::EmitRegMem(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base, in EmitRegMem() argument
1127 EmitMemReg(entry, raw_base, disp, raw_reg); in EmitRegMem()
1130 void X86Mir2Lir::EmitRegArray(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base, in EmitRegArray() argument
1132 CheckValidByteRegister(entry, raw_reg); in EmitRegArray()
1133 EmitPrefixAndOpcode(entry, raw_reg, raw_index, raw_base); in EmitRegArray()
1134 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitRegArray()
1144 int scale, int32_t disp, int32_t raw_reg) { in EmitArrayReg() argument
1146 EmitRegArray(entry, raw_reg, raw_base, raw_index, scale, disp); in EmitArrayReg()
1171 void X86Mir2Lir::EmitRegThread(const X86EncodingMap* entry, int32_t raw_reg, int32_t disp) { in EmitRegThread() argument
1174 EmitPrefixAndOpcode(entry, raw_reg, NO_REG, NO_REG); in EmitRegThread()
1175 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitRegThread()
1215 int32_t raw_reg, int32_t raw_base, int disp, int32_t imm) { in EmitRegMemImm() argument
1216 DCHECK(!RegStorage::IsFloat(raw_reg)); in EmitRegMemImm()
1217 CheckValidByteRegister(entry, raw_reg); in EmitRegMemImm()
1218 EmitPrefixAndOpcode(entry, raw_reg, NO_REG, raw_base); in EmitRegMemImm()
1219 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitRegMemImm()
1228 int32_t raw_base, int32_t disp, int32_t raw_reg, int32_t imm) { in EmitMemRegImm() argument
1230 EmitRegMemImm(entry, raw_reg, raw_base, disp, imm); in EmitMemRegImm()
1233 void X86Mir2Lir::EmitRegImm(const X86EncodingMap* entry, int32_t raw_reg, int32_t imm) { in EmitRegImm() argument
1234 CheckValidByteRegister(entry, raw_reg); in EmitRegImm()
1235 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitRegImm()
1236 if (RegStorage::RegNum(raw_reg) == rs_rAX.GetRegNum() && entry->skeleton.ax_opcode != 0) { in EmitRegImm()
1239 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitRegImm()
1259 void X86Mir2Lir::EmitMovRegImm(const X86EncodingMap* entry, int32_t raw_reg, int64_t imm) { in EmitMovRegImm() argument
1261 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitMovRegImm()
1262 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitMovRegImm()
1287 void X86Mir2Lir::EmitShiftRegImm(const X86EncodingMap* entry, int32_t raw_reg, int32_t imm) { in EmitShiftRegImm() argument
1288 CheckValidByteRegister(entry, raw_reg); in EmitShiftRegImm()
1289 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitShiftRegImm()
1299 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitShiftRegImm()
1309 void X86Mir2Lir::EmitShiftRegCl(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_cl) { in EmitShiftRegCl() argument
1310 CheckValidByteRegister(entry, raw_reg); in EmitShiftRegCl()
1312 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitShiftRegCl()
1317 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitShiftRegCl()
1361 void X86Mir2Lir::EmitRegCond(const X86EncodingMap* entry, int32_t raw_reg, int32_t cc) { in EmitRegCond() argument
1362 CheckValidByteRegister(entry, raw_reg); in EmitRegCond()
1363 EmitPrefix(entry, NO_REG, NO_REG, raw_reg); in EmitRegCond()
1372 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitRegCond()
1526 void X86Mir2Lir::EmitPcRel(const X86EncodingMap* entry, int32_t raw_reg, int32_t raw_base_or_table, in EmitPcRel() argument
1541 EmitPrefix(entry, raw_reg, raw_index, raw_base_or_table); in EmitPcRel()
1546 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitPcRel()
1556 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitPcRel()
1567 void X86Mir2Lir::EmitMacro(const X86EncodingMap* entry, int32_t raw_reg, int32_t offset) { in EmitMacro() argument
1570 EmitPrefix(entry, raw_reg, NO_REG, NO_REG); in EmitMacro()
1577 uint8_t low_reg = LowRegisterBits(raw_reg); in EmitMacro()
1581 raw_reg, offset + 5 /* size of call +0 */); in EmitMacro()