Lines Matching defs:cond
29 Condition cond) { in and_()
35 Condition cond) { in eor()
41 Condition cond) { in sub()
46 Condition cond) { in rsb()
51 Condition cond) { in rsbs()
57 Condition cond) { in add()
63 Condition cond) { in adds()
69 Condition cond) { in subs()
75 Condition cond) { in adc()
81 Condition cond) { in sbc()
87 Condition cond) { in rsc()
92 void Arm32Assembler::tst(Register rn, const ShifterOperand& so, Condition cond) { in tst()
98 void Arm32Assembler::teq(Register rn, const ShifterOperand& so, Condition cond) { in teq()
104 void Arm32Assembler::cmp(Register rn, const ShifterOperand& so, Condition cond) { in cmp()
109 void Arm32Assembler::cmn(Register rn, const ShifterOperand& so, Condition cond) { in cmn()
115 const ShifterOperand& so, Condition cond) { in orr()
121 const ShifterOperand& so, Condition cond) { in orrs()
126 void Arm32Assembler::mov(Register rd, const ShifterOperand& so, Condition cond) { in mov()
131 void Arm32Assembler::movs(Register rd, const ShifterOperand& so, Condition cond) { in movs()
137 Condition cond) { in bic()
142 void Arm32Assembler::mvn(Register rd, const ShifterOperand& so, Condition cond) { in mvn()
147 void Arm32Assembler::mvns(Register rd, const ShifterOperand& so, Condition cond) { in mvns()
152 void Arm32Assembler::mul(Register rd, Register rn, Register rm, Condition cond) { in mul()
159 Condition cond) { in mla()
166 Condition cond) { in mls()
173 Register rm, Condition cond) { in umull()
179 void Arm32Assembler::sdiv(Register rd, Register rn, Register rm, Condition cond) { in sdiv()
195 void Arm32Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) { in udiv()
211 void Arm32Assembler::ldr(Register rd, const Address& ad, Condition cond) { in ldr()
216 void Arm32Assembler::str(Register rd, const Address& ad, Condition cond) { in str()
221 void Arm32Assembler::ldrb(Register rd, const Address& ad, Condition cond) { in ldrb()
226 void Arm32Assembler::strb(Register rd, const Address& ad, Condition cond) { in strb()
231 void Arm32Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh()
236 void Arm32Assembler::strh(Register rd, const Address& ad, Condition cond) { in strh()
241 void Arm32Assembler::ldrsb(Register rd, const Address& ad, Condition cond) { in ldrsb()
246 void Arm32Assembler::ldrsh(Register rd, const Address& ad, Condition cond) { in ldrsh()
251 void Arm32Assembler::ldrd(Register rd, const Address& ad, Condition cond) { in ldrd()
257 void Arm32Assembler::strd(Register rd, const Address& ad, Condition cond) { in strd()
266 Condition cond) { in ldm()
274 Condition cond) { in stm()
279 void Arm32Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) { in vmovs()
284 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd()
289 bool Arm32Assembler::vmovs(SRegister sd, float s_imm, Condition cond) { in vmovs()
304 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd()
320 Condition cond) { in vadds()
326 Condition cond) { in vaddd()
332 Condition cond) { in vsubs()
338 Condition cond) { in vsubd()
344 Condition cond) { in vmuls()
350 Condition cond) { in vmuld()
356 Condition cond) { in vmlas()
362 Condition cond) { in vmlad()
368 Condition cond) { in vmlss()
374 Condition cond) { in vmlsd()
380 Condition cond) { in vdivs()
386 Condition cond) { in vdivd()
391 void Arm32Assembler::vabss(SRegister sd, SRegister sm, Condition cond) { in vabss()
396 void Arm32Assembler::vabsd(DRegister dd, DRegister dm, Condition cond) { in vabsd()
401 void Arm32Assembler::vnegs(SRegister sd, SRegister sm, Condition cond) { in vnegs()
406 void Arm32Assembler::vnegd(DRegister dd, DRegister dm, Condition cond) { in vnegd()
411 void Arm32Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) { in vsqrts()
415 void Arm32Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) { in vsqrtd()
420 void Arm32Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) { in vcvtsd()
425 void Arm32Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) { in vcvtds()
430 void Arm32Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) { in vcvtis()
435 void Arm32Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) { in vcvtid()
440 void Arm32Assembler::vcvtsi(SRegister sd, SRegister sm, Condition cond) { in vcvtsi()
445 void Arm32Assembler::vcvtdi(DRegister dd, SRegister sm, Condition cond) { in vcvtdi()
450 void Arm32Assembler::vcvtus(SRegister sd, SRegister sm, Condition cond) { in vcvtus()
455 void Arm32Assembler::vcvtud(SRegister sd, DRegister dm, Condition cond) { in vcvtud()
460 void Arm32Assembler::vcvtsu(SRegister sd, SRegister sm, Condition cond) { in vcvtsu()
465 void Arm32Assembler::vcvtdu(DRegister dd, SRegister sm, Condition cond) { in vcvtdu()
470 void Arm32Assembler::vcmps(SRegister sd, SRegister sm, Condition cond) { in vcmps()
475 void Arm32Assembler::vcmpd(DRegister dd, DRegister dm, Condition cond) { in vcmpd()
480 void Arm32Assembler::vcmpsz(SRegister sd, Condition cond) { in vcmpsz()
485 void Arm32Assembler::vcmpdz(DRegister dd, Condition cond) { in vcmpdz()
489 void Arm32Assembler::b(Label* label, Condition cond) { in b()
494 void Arm32Assembler::bl(Label* label, Condition cond) { in bl()
514 void Arm32Assembler::EmitType01(Condition cond, in EmitType01()
534 void Arm32Assembler::EmitType5(Condition cond, int offset, bool link) { in EmitType5()
543 void Arm32Assembler::EmitMemOp(Condition cond, in EmitMemOp()
582 void Arm32Assembler::EmitMemOpAddressMode3(Condition cond, in EmitMemOpAddressMode3()
598 void Arm32Assembler::EmitMultiMemOp(Condition cond, in EmitMultiMemOp()
615 void Arm32Assembler::EmitShiftImmediate(Condition cond, in EmitShiftImmediate()
632 void Arm32Assembler::EmitShiftRegister(Condition cond, in EmitShiftRegister()
650 void Arm32Assembler::EmitBranch(Condition cond, Label* label, bool link) { in EmitBranch()
662 void Arm32Assembler::clz(Register rd, Register rm, Condition cond) { in clz()
676 void Arm32Assembler::movw(Register rd, uint16_t imm16, Condition cond) { in movw()
685 void Arm32Assembler::movt(Register rd, uint16_t imm16, Condition cond) { in movt()
694 void Arm32Assembler::EmitMulOp(Condition cond, int32_t opcode, in EmitMulOp()
712 void Arm32Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex()
730 Condition cond) { in strex()
746 void Arm32Assembler::clrex(Condition cond) { in clrex()
754 void Arm32Assembler::nop(Condition cond) { in nop()
762 void Arm32Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { in vmovsr()
777 void Arm32Assembler::vmovrs(Register rt, SRegister sn, Condition cond) { in vmovrs()
793 Condition cond) { in vmovsrr()
814 Condition cond) { in vmovrrs()
836 Condition cond) { in vmovdrr()
856 Condition cond) { in vmovrrd()
876 void Arm32Assembler::vldrs(SRegister sd, const Address& ad, Condition cond) { in vldrs()
889 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) { in vstrs()
903 void Arm32Assembler::vldrd(DRegister dd, const Address& ad, Condition cond) { in vldrd()
916 void Arm32Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) { in vstrd()
930 void Arm32Assembler::vpushs(SRegister reg, int nregs, Condition cond) { in vpushs()
935 void Arm32Assembler::vpushd(DRegister reg, int nregs, Condition cond) { in vpushd()
940 void Arm32Assembler::vpops(SRegister reg, int nregs, Condition cond) { in vpops()
945 void Arm32Assembler::vpopd(DRegister reg, int nregs, Condition cond) { in vpopd()
950 void Arm32Assembler::EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond) { in EmitVPushPop()
976 void Arm32Assembler::EmitVFPsss(Condition cond, int32_t opcode, in EmitVFPsss()
994 void Arm32Assembler::EmitVFPddd(Condition cond, int32_t opcode, in EmitVFPddd()
1012 void Arm32Assembler::EmitVFPsd(Condition cond, int32_t opcode, in EmitVFPsd()
1027 void Arm32Assembler::EmitVFPds(Condition cond, int32_t opcode, in EmitVFPds()
1043 bool setcc, Condition cond) { in Lsl()
1054 bool setcc, Condition cond) { in Lsr()
1066 bool setcc, Condition cond) { in Asr()
1078 bool setcc, Condition cond) { in Ror()
1087 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { in Rrx()
1097 bool setcc, Condition cond) { in Lsl()
1107 bool setcc, Condition cond) { in Lsr()
1117 bool setcc, Condition cond) { in Asr()
1127 bool setcc, Condition cond) { in Ror()
1135 void Arm32Assembler::vmstat(Condition cond) { // VMRS APSR_nzcv, FPSCR in vmstat()
1159 void Arm32Assembler::blx(Register rm, Condition cond) { in blx()
1169 void Arm32Assembler::bx(Register rm, Condition cond) { in bx()
1179 void Arm32Assembler::Push(Register rd, Condition cond) { in Push()
1184 void Arm32Assembler::Pop(Register rd, Condition cond) { in Pop()
1189 void Arm32Assembler::PushList(RegList regs, Condition cond) { in PushList()
1194 void Arm32Assembler::PopList(RegList regs, Condition cond) { in PopList()
1199 void Arm32Assembler::Mov(Register rd, Register rm, Condition cond) { in Mov()
1239 void Arm32Assembler::AddConstant(Register rd, int32_t value, Condition cond) { in AddConstant()
1245 Condition cond) { in AddConstant()
1281 Condition cond) { in AddConstantSetFlags()
1307 void Arm32Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { in LoadImmediate()
1329 Condition cond) { in LoadFromOffset()
1368 Condition cond) { in LoadSFromOffset()
1386 Condition cond) { in LoadDFromOffset()
1405 Condition cond) { in StoreToOffset()
1439 Condition cond) { in StoreSToOffset()
1457 Condition cond) { in StoreDToOffset()