Lines Matching refs:CHECK_NE

95   CHECK_NE(rn, PC);  // Reserve tst pc instruction for exception handler marker.  in tst()
101 CHECK_NE(rn, PC); // Reserve teq pc instruction for exception handler marker. in teq()
1082 CHECK_NE(rd, kNoRegister); in EmitDataProcessing()
1130 CHECK_NE(shift, RRX); in EmitShift()
1251 CHECK_NE(rd, kNoRegister); in EmitLoadStore()
1412 CHECK_NE(base, kNoRegister); in EmitMultiMemOp()
1512 CHECK_NE(rd, kNoRegister); in clz()
1513 CHECK_NE(rm, kNoRegister); in clz()
1515 CHECK_NE(rd, PC); in clz()
1516 CHECK_NE(rm, PC); in clz()
1576 CHECK_NE(rn, kNoRegister); in ldrex()
1577 CHECK_NE(rt, kNoRegister); in ldrex()
1579 CHECK_NE(rn, kNoRegister); in ldrex()
1580 CHECK_NE(rt, kNoRegister); in ldrex()
1603 CHECK_NE(rn, kNoRegister); in strex()
1604 CHECK_NE(rd, kNoRegister); in strex()
1605 CHECK_NE(rt, kNoRegister); in strex()
1648 CHECK_NE(sn, kNoSRegister); in vmovsr()
1649 CHECK_NE(rt, kNoRegister); in vmovsr()
1650 CHECK_NE(rt, SP); in vmovsr()
1651 CHECK_NE(rt, PC); in vmovsr()
1663 CHECK_NE(sn, kNoSRegister); in vmovrs()
1664 CHECK_NE(rt, kNoRegister); in vmovrs()
1665 CHECK_NE(rt, SP); in vmovrs()
1666 CHECK_NE(rt, PC); in vmovrs()
1679 CHECK_NE(sm, kNoSRegister); in vmovsrr()
1680 CHECK_NE(sm, S31); in vmovsrr()
1681 CHECK_NE(rt, kNoRegister); in vmovsrr()
1682 CHECK_NE(rt, SP); in vmovsrr()
1683 CHECK_NE(rt, PC); in vmovsrr()
1684 CHECK_NE(rt2, kNoRegister); in vmovsrr()
1685 CHECK_NE(rt2, SP); in vmovsrr()
1686 CHECK_NE(rt2, PC); in vmovsrr()
1700 CHECK_NE(sm, kNoSRegister); in vmovrrs()
1701 CHECK_NE(sm, S31); in vmovrrs()
1702 CHECK_NE(rt, kNoRegister); in vmovrrs()
1703 CHECK_NE(rt, SP); in vmovrrs()
1704 CHECK_NE(rt, PC); in vmovrrs()
1705 CHECK_NE(rt2, kNoRegister); in vmovrrs()
1706 CHECK_NE(rt2, SP); in vmovrrs()
1707 CHECK_NE(rt2, PC); in vmovrrs()
1708 CHECK_NE(rt, rt2); in vmovrrs()
1722 CHECK_NE(dm, kNoDRegister); in vmovdrr()
1723 CHECK_NE(rt, kNoRegister); in vmovdrr()
1724 CHECK_NE(rt, SP); in vmovdrr()
1725 CHECK_NE(rt, PC); in vmovdrr()
1726 CHECK_NE(rt2, kNoRegister); in vmovdrr()
1727 CHECK_NE(rt2, SP); in vmovdrr()
1728 CHECK_NE(rt2, PC); in vmovdrr()
1742 CHECK_NE(dm, kNoDRegister); in vmovrrd()
1743 CHECK_NE(rt, kNoRegister); in vmovrrd()
1744 CHECK_NE(rt, SP); in vmovrrd()
1745 CHECK_NE(rt, PC); in vmovrrd()
1746 CHECK_NE(rt2, kNoRegister); in vmovrrd()
1747 CHECK_NE(rt2, SP); in vmovrrd()
1748 CHECK_NE(rt2, PC); in vmovrrd()
1749 CHECK_NE(rt, rt2); in vmovrrd()
1763 CHECK_NE(sd, kNoSRegister); in vldrs()
1776 CHECK_NE(static_cast<Register>(addr.encodingArm() & (0xf << kRnShift)), PC); in vstrs()
1777 CHECK_NE(sd, kNoSRegister); in vstrs()
1790 CHECK_NE(dd, kNoDRegister); in vldrd()
1803 CHECK_NE(static_cast<Register>(addr.encodingArm() & (0xf << kRnShift)), PC); in vstrd()
1804 CHECK_NE(dd, kNoDRegister); in vstrd()
1863 CHECK_NE(sd, kNoSRegister); in EmitVFPsss()
1864 CHECK_NE(sn, kNoSRegister); in EmitVFPsss()
1865 CHECK_NE(sm, kNoSRegister); in EmitVFPsss()
1881 CHECK_NE(dd, kNoDRegister); in EmitVFPddd()
1882 CHECK_NE(dn, kNoDRegister); in EmitVFPddd()
1883 CHECK_NE(dm, kNoDRegister); in EmitVFPddd()
1899 CHECK_NE(sd, kNoSRegister); in EmitVFPsd()
1900 CHECK_NE(dm, kNoDRegister); in EmitVFPsd()
1914 CHECK_NE(dd, kNoDRegister); in EmitVFPds()
1915 CHECK_NE(sm, kNoSRegister); in EmitVFPds()
2034 CHECK_NE(rm, kNoRegister); in blx()
2042 CHECK_NE(rm, kNoRegister); in bx()
2157 CHECK_NE(shift_imm, 0u); // Do not use Lsl if no shift is wanted. in Lsl()
2165 CHECK_NE(shift_imm, 0u); // Do not use Lsr if no shift is wanted. in Lsr()
2174 CHECK_NE(shift_imm, 0u); // Do not use Asr if no shift is wanted. in Asr()
2183 CHECK_NE(shift_imm, 0u); // Use Rrx instruction. in Ror()
2420 CHECK_NE(base, IP); in LoadSFromOffset()
2438 CHECK_NE(base, IP); in LoadDFromOffset()
2491 CHECK_NE(base, IP); in StoreSToOffset()
2509 CHECK_NE(base, IP); in StoreDToOffset()