Lines Matching refs:base
477 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base, in LoadFromOffset() argument
481 Lb(reg, base, offset); in LoadFromOffset()
484 Lbu(reg, base, offset); in LoadFromOffset()
487 Lh(reg, base, offset); in LoadFromOffset()
490 Lhu(reg, base, offset); in LoadFromOffset()
493 Lw(reg, base, offset); in LoadFromOffset()
503 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) { in LoadSFromOffset() argument
504 Lwc1(reg, base, offset); in LoadSFromOffset()
507 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_t offset) { in LoadDFromOffset() argument
508 Ldc1(reg, base, offset); in LoadDFromOffset()
511 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base, in StoreToOffset() argument
515 Sb(reg, base, offset); in StoreToOffset()
518 Sh(reg, base, offset); in StoreToOffset()
521 Sw(reg, base, offset); in StoreToOffset()
531 void MipsAssembler::StoreFToOffset(FRegister reg, Register base, int32_t offset) { in StoreFToOffset() argument
532 Swc1(reg, base, offset); in StoreFToOffset()
535 void MipsAssembler::StoreDToOffset(DRegister reg, Register base, int32_t offset) { in StoreDToOffset() argument
536 Sdc1(reg, base, offset); in StoreDToOffset()
683 void MipsAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base, in LoadRef() argument
688 base.AsMips().AsCoreRegister(), offs.Int32Value()); in LoadRef()
694 void MipsAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, in LoadRawPtr() argument
699 base.AsMips().AsCoreRegister(), offs.Int32Value()); in LoadRawPtr()
906 MipsManagedRegister base = mbase.AsMips(); in Call() local
908 CHECK(base.IsCoreRegister()) << base; in Call()
911 base.AsCoreRegister(), offset.Int32Value()); in Call()
916 void MipsAssembler::Call(FrameOffset base, Offset offset, ManagedRegister mscratch) { in Call() argument
921 SP, base.Int32Value()); in Call()