47 void X86_64Assembler::call(const Address& address) {  in call()
69 void X86_64Assembler::pushq(const Address& address) {  in pushq()
97 void X86_64Assembler::popq(const Address& address) {  in popq()
146 void X86_64Assembler::movq(CpuRegister dst, const Address& src) {  in movq()
154 void X86_64Assembler::movl(CpuRegister dst, const Address& src) {  in movl()
162 void X86_64Assembler::movq(const Address& dst, CpuRegister src) {  in movq()
170 void X86_64Assembler::movl(const Address& dst, CpuRegister src) {  in movl()
177 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) {  in movl()
194 void X86_64Assembler::movzxb(CpuRegister dst, const Address& src) {  in movzxb()
212 void X86_64Assembler::movsxb(CpuRegister dst, const Address& src) {  in movsxb()
221 void X86_64Assembler::movb(CpuRegister /*dst*/, const Address& /*src*/) {  in movb()  argument
226 void X86_64Assembler::movb(const Address& dst, CpuRegister src) {  in movb()
234 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) {  in movb()
252 void X86_64Assembler::movzxw(CpuRegister dst, const Address& src) {  in movzxw()
270 void X86_64Assembler::movsxw(CpuRegister dst, const Address& src) {  in movsxw()
279 void X86_64Assembler::movw(CpuRegister /*dst*/, const Address& /*src*/) {  in movw()  argument
284 void X86_64Assembler::movw(const Address& dst, CpuRegister src) {  in movw()
293 void X86_64Assembler::leaq(CpuRegister dst, const Address& src) {  in leaq()
301 void X86_64Assembler::movss(XmmRegister dst, const Address& src) {  in movss()
311 void X86_64Assembler::movss(const Address& dst, XmmRegister src) {  in movss()
361 void X86_64Assembler::addss(XmmRegister dst, const Address& src) {  in addss()
381 void X86_64Assembler::subss(XmmRegister dst, const Address& src) {  in subss()
401 void X86_64Assembler::mulss(XmmRegister dst, const Address& src) {  in mulss()
421 void X86_64Assembler::divss(XmmRegister dst, const Address& src) {  in divss()
431 void X86_64Assembler::flds(const Address& src) {  in flds()
438 void X86_64Assembler::fstps(const Address& dst) {  in fstps()
445 void X86_64Assembler::movsd(XmmRegister dst, const Address& src) {  in movsd()
455 void X86_64Assembler::movsd(const Address& dst, XmmRegister src) {  in movsd()
485 void X86_64Assembler::addsd(XmmRegister dst, const Address& src) {  in addsd()
505 void X86_64Assembler::subsd(XmmRegister dst, const Address& src) {  in subsd()
525 void X86_64Assembler::mulsd(XmmRegister dst, const Address& src) {  in mulsd()
545 void X86_64Assembler::divsd(XmmRegister dst, const Address& src) {  in divsd()
684 void X86_64Assembler::xorpd(XmmRegister dst, const Address& src) {  in xorpd()
704 void X86_64Assembler::xorps(XmmRegister dst, const Address& src) {  in xorps()
722 void X86_64Assembler::andpd(XmmRegister dst, const Address& src) {  in andpd()
732 void X86_64Assembler::fldl(const Address& src) {  in fldl()
739 void X86_64Assembler::fstpl(const Address& dst) {  in fstpl()
746 void X86_64Assembler::fnstcw(const Address& dst) {  in fnstcw()
753 void X86_64Assembler::fldcw(const Address& src) {  in fldcw()
760 void X86_64Assembler::fistpl(const Address& dst) {  in fistpl()
767 void X86_64Assembler::fistps(const Address& dst) {  in fistps()
774 void X86_64Assembler::fildl(const Address& src) {  in fildl()
833 void X86_64Assembler::xchgl(CpuRegister reg, const Address& address) {  in xchgl()
856 void X86_64Assembler::cmpl(CpuRegister reg, const Address& address) {  in cmpl()
880 void X86_64Assembler::cmpq(CpuRegister reg, const Address& address) {  in cmpq()
896 void X86_64Assembler::addl(CpuRegister reg, const Address& address) {  in addl()
904 void X86_64Assembler::cmpl(const Address& address, CpuRegister reg) {  in cmpl()
912 void X86_64Assembler::cmpl(const Address& address, const Immediate& imm) {  in cmpl()
953 void X86_64Assembler::testq(CpuRegister reg, const Address& address) {  in testq()
1050 void X86_64Assembler::rex_reg_mem(bool force, bool w, Register* dst, const Address& mem) {
1072 void rex_mem_reg(bool force, bool w, Address* mem, Register* src);
1090 void X86_64Assembler::addq(CpuRegister dst, const Address& address) {  in addq()
1107 void X86_64Assembler::addl(const Address& address, CpuRegister reg) {  in addl()
1115 void X86_64Assembler::addl(const Address& address, const Immediate& imm) {  in addl()
1153 void X86_64Assembler::subq(CpuRegister reg, const Address& address) {  in subq()
1161 void X86_64Assembler::subl(CpuRegister reg, const Address& address) {  in subl()
1201 void X86_64Assembler::imull(CpuRegister reg, const Address& address) {  in imull()
1218 void X86_64Assembler::imull(const Address& address) {  in imull()
1234 void X86_64Assembler::mull(const Address& address) {  in mull()
1374 void X86_64Assembler::jmp(const Address& address) {  in jmp()
1409 void X86_64Assembler::cmpxchgl(const Address& address, CpuRegister reg) {  in cmpxchgl()
1461   movsd(dst, Address(CpuRegister(RSP), 0));  in LoadDoubleConstant()
1474   xorps(f, Address::Absolute(reinterpret_cast<uword>(&float_negate_constant)));  in FloatNegate()
1484   xorpd(d, Address::Absolute(reinterpret_cast<uword>(&double_negate_constant)));  in DoubleNegate()
1494   andpd(reg, Address::Absolute(reinterpret_cast<uword>(&double_abs_constant)));  in DoubleAbs()
1742       movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister());  in BuildFrame()
1748   movl(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister());  in BuildFrame()
1754         movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()),  in BuildFrame()
1758 …movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegiste…  in BuildFrame()
1762 …movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist…  in BuildFrame()
1765 …movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist…  in BuildFrame()
1781       movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset));  in RemoveFrame()
1813       movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister());  in Store()
1816       movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister());  in Store()
1820     movq(Address(CpuRegister(RSP), offs), src.AsRegisterPairLow());  in Store()
1821     movq(Address(CpuRegister(RSP), FrameOffset(offs.Int32Value()+4)),  in Store()
1825       fstps(Address(CpuRegister(RSP), offs));  in Store()
1827       fstpl(Address(CpuRegister(RSP), offs));  in Store()
1832       movss(Address(CpuRegister(RSP), offs), src.AsXmmRegister());  in Store()
1834       movsd(Address(CpuRegister(RSP), offs), src.AsXmmRegister());  in Store()
1842   movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister());  in StoreRef()
1848   movq(Address(CpuRegister(RSP), dest), src.AsCpuRegister());  in StoreRawPtr()
1853   movl(Address(CpuRegister(RSP), dest), Immediate(imm));  // TODO(64) movq?  in StoreImmediateToFrame()
1858   gs()->movl(Address::Absolute(dest, true), Immediate(imm));  // TODO(64) movq?  in StoreImmediateToThread64()
1866   leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), fr_offs));  in StoreStackOffsetToThread64()
1867   gs()->movq(Address::Absolute(thr_offs, true), scratch.AsCpuRegister());  in StoreStackOffsetToThread64()
1871   gs()->movq(Address::Absolute(thr_offs, true), CpuRegister(RSP));  in StoreStackPointerToThread64()
1886       movl(dest.AsCpuRegister(), Address(CpuRegister(RSP), src));  in Load()
1889       movq(dest.AsCpuRegister(), Address(CpuRegister(RSP), src));  in Load()
1893     movq(dest.AsRegisterPairLow(), Address(CpuRegister(RSP), src));  in Load()
1894     movq(dest.AsRegisterPairHigh(), Address(CpuRegister(RSP), FrameOffset(src.Int32Value()+4)));  in Load()
1897       flds(Address(CpuRegister(RSP), src));  in Load()
1899       fldl(Address(CpuRegister(RSP), src));  in Load()
1904       movss(dest.AsXmmRegister(), Address(CpuRegister(RSP), src));  in Load()
1906       movsd(dest.AsXmmRegister(), Address(CpuRegister(RSP), src));  in Load()
1917     gs()->movl(dest.AsCpuRegister(), Address::Absolute(src, true));  in LoadFromThread64()
1920     gs()->movq(dest.AsRegisterPairLow(), Address::Absolute(src, true));  in LoadFromThread64()
1923       gs()->flds(Address::Absolute(src, true));  in LoadFromThread64()
1925       gs()->fldl(Address::Absolute(src, true));  in LoadFromThread64()
1930       gs()->movss(dest.AsXmmRegister(), Address::Absolute(src, true));  in LoadFromThread64()
1932       gs()->movsd(dest.AsXmmRegister(), Address::Absolute(src, true));  in LoadFromThread64()
1940   movq(dest.AsCpuRegister(), Address(CpuRegister(RSP), src));  in LoadRef()
1947   movq(dest.AsCpuRegister(), Address(base.AsX86_64().AsCpuRegister(), offs));  in LoadRef()
1954   movq(dest.AsCpuRegister(), Address(base.AsX86_64().AsCpuRegister(), offs));  in LoadRawPtr()
1960   gs()->movq(dest.AsCpuRegister(), Address::Absolute(offs, true));  in LoadRawPtrFromThread64()
1996         fstps(Address(CpuRegister(RSP), 0));  in Move()
1997         movss(dest.AsXmmRegister(), Address(CpuRegister(RSP), 0));  in Move()
2000         fstpl(Address(CpuRegister(RSP), 0));  in Move()
2001         movsd(dest.AsXmmRegister(), Address(CpuRegister(RSP), 0));  in Move()
2015   movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), src));  in CopyRef()
2016   movl(Address(CpuRegister(RSP), dest), scratch.AsCpuRegister());  in CopyRef()
2024   gs()->movq(scratch.AsCpuRegister(), Address::Absolute(thr_offs, true));  in CopyRawPtrFromThread64()
2034   gs()->movq(Address::Absolute(thr_offs, true), scratch.AsCpuRegister());  in CopyRawPtrToThread64()
2061   pushq(Address(CpuRegister(RSP), src));  in Copy()
2062   popq(Address(dest_base.AsX86_64().AsCpuRegister(), dest_offset));  in Copy()
2069   movq(scratch, Address(CpuRegister(RSP), src_base));  in Copy()
2070   movq(scratch, Address(scratch, src_offset));  in Copy()
2071   movq(Address(CpuRegister(RSP), dest), scratch);  in Copy()
2079   pushq(Address(src.AsX86_64().AsCpuRegister(), src_offset));  in Copy()
2080   popq(Address(dest.AsX86_64().AsCpuRegister(), dest_offset));  in Copy()
2088   movq(scratch, Address(CpuRegister(RSP), src));  in Copy()
2089   pushq(Address(scratch, src_offset));  in Copy()
2090   popq(Address(scratch, dest_offset));  in Copy()
2108     movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));  in CreateHandleScopeEntry()
2120     leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));  in CreateHandleScopeEntry()
2123     leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));  in CreateHandleScopeEntry()
2135     movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));  in CreateHandleScopeEntry()
2138     leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));  in CreateHandleScopeEntry()
2141     leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));  in CreateHandleScopeEntry()
2159   movq(out_reg.AsCpuRegister(), Address(in_reg.AsCpuRegister(), 0));  in LoadReferenceFromHandleScope()
2174   call(Address(base.AsCpuRegister(), offset.Int32Value()));  in Call()
2180   movl(scratch, Address(CpuRegister(RSP), base));  in Call()
2181   call(Address(scratch, offset));  in Call()
2185   gs()->call(Address::Absolute(offset, true));  in CallFromThread64()
2189   gs()->movq(tr.AsX86_64().AsCpuRegister(), Address::Absolute(Thread::SelfOffset<8>(), true));  in GetCurrentThread()
2194   gs()->movq(scratch.AsCpuRegister(), Address::Absolute(Thread::SelfOffset<8>(), true));  in GetCurrentThread()
2195   movq(Address(CpuRegister(RSP), offset), scratch.AsCpuRegister());  in GetCurrentThread()
2210   gs()->cmpl(Address::Absolute(Thread::ExceptionOffset<8>(), true), Immediate(0));  in ExceptionPoll()
2223   __ gs()->movq(CpuRegister(RDI), Address::Absolute(Thread::ExceptionOffset<8>(), true));  in Emit()
2224   __ gs()->call(Address::Absolute(QUICK_ENTRYPOINT_OFFSET(8, pDeliverException), true));  in Emit()