79   Register base() const {  in base()  function
118   void SetSIB(ScaleFactor scale, CpuRegister index, CpuRegister base) {  in SetSIB()  argument
121     if (base.NeedsRex()) {  in SetSIB()
128         static_cast<uint8_t>(base.LowBits());  in SetSIB()
166   Address(CpuRegister base, int32_t disp) {  in Address()  argument
167     Init(base, disp);  in Address()
170   Address(CpuRegister base, Offset disp) {  in Address()  argument
171     Init(base, disp.Int32Value());  in Address()
174   Address(CpuRegister base, FrameOffset disp) {  in Address()  argument
175     CHECK_EQ(base.AsRegister(), RSP);  in Address()
179   Address(CpuRegister base, MemberOffset disp) {  in Address()  argument
180     Init(base, disp.Int32Value());  in Address()
183   void Init(CpuRegister base, int32_t disp) {  in Init()  argument
184     if (disp == 0 && base.AsRegister() != RBP) {  in Init()
185       SetModRM(0, base);  in Init()
186       if (base.AsRegister() == RSP) {  in Init()
187         SetSIB(TIMES_1, CpuRegister(RSP), base);  in Init()
190       SetModRM(1, base);  in Init()
191       if (base.AsRegister() == RSP) {  in Init()
192         SetSIB(TIMES_1, CpuRegister(RSP), base);  in Init()
196       SetModRM(2, base);  in Init()
197       if (base.AsRegister() == RSP) {  in Init()
198         SetSIB(TIMES_1, CpuRegister(RSP), base);  in Init()
212   Address(CpuRegister base, CpuRegister index, ScaleFactor scale, int32_t disp) {  in Address()  argument
214     if (disp == 0 && base.AsRegister() != RBP) {  in Address()
216       SetSIB(scale, index, base);  in Address()
219       SetSIB(scale, index, base);  in Address()
223       SetSIB(scale, index, base);  in Address()
541   void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs) OVERRIDE;
543   void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
609   void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE;
610   void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE;