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Searched defs:base (Results 1 – 25 of 38) sorted by relevance

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/art/compiler/utils/x86_64/
Dassembler_x86_64.h79 Register base() const { in base() function
118 void SetSIB(ScaleFactor scale, CpuRegister index, CpuRegister base) { in SetSIB()
166 Address(CpuRegister base, int32_t disp) { in Address()
170 Address(CpuRegister base, Offset disp) { in Address()
174 Address(CpuRegister base, FrameOffset disp) { in Address()
179 Address(CpuRegister base, MemberOffset disp) { in Address()
183 void Init(CpuRegister base, int32_t disp) { in Init()
212 Address(CpuRegister base, CpuRegister index, ScaleFactor scale, int32_t disp) { in Address()
/art/compiler/utils/x86/
Dassembler_x86.h67 Register base() const { in base() function
98 void SetSIB(ScaleFactor scale, Register index, Register base) { in SetSIB()
138 Address(Register base, int32_t disp) { in Address()
142 Address(Register base, Offset disp) { in Address()
146 Address(Register base, FrameOffset disp) { in Address()
151 Address(Register base, MemberOffset disp) { in Address()
155 void Init(Register base, int32_t disp) { in Init()
178 Address(Register base, Register index, ScaleFactor scale, int32_t disp) { in Address()
/art/compiler/utils/arm64/
Dassembler_arm64.cc93 Register base, int32_t offset) { in StoreWToOffset()
109 void Arm64Assembler::StoreToOffset(Register source, Register base, int32_t offset) { in StoreToOffset()
114 void Arm64Assembler::StoreSToOffset(SRegister source, Register base, int32_t offset) { in StoreSToOffset()
118 void Arm64Assembler::StoreDToOffset(DRegister source, Register base, int32_t offset) { in StoreDToOffset()
216 Register base, int32_t offset) { in LoadWFromOffset()
240 void Arm64Assembler::LoadFromOffset(Register dest, Register base, in LoadFromOffset()
246 void Arm64Assembler::LoadSFromOffset(SRegister dest, Register base, in LoadSFromOffset()
251 void Arm64Assembler::LoadDFromOffset(DRegister dest, Register base, in LoadDFromOffset()
256 void Arm64Assembler::Load(Arm64ManagedRegister dest, Register base, in Load()
296 Arm64ManagedRegister base = m_base.AsArm64(); in LoadRef() local
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/art/test/065-mismatched-implements/src/
DIndirect.java25 Base base = new Base(); in main() local
/art/test/066-mismatched-super/src/
DIndirect.java25 Base base = new Base(); in main() local
/art/test/106-exceptions2/src/
DMain.java134 Main base = new Main(); in nullCheckTestNoThrow() local
143 Main base = new Main(); in nullCheckTestThrow() local
/art/runtime/gc/space/
Ddlmalloc_space.h140 void* CreateAllocator(void* base, size_t morecore_start, size_t initial_size, in CreateAllocator()
Drosalloc_space.h137 void* CreateAllocator(void* base, size_t morecore_start, size_t initial_size, in CreateAllocator()
/art/compiler/utils/
Dassembler_test.h60 std::string base = fmt; in RepeatR() local
86 std::string base = fmt; in RepeatRR() local
124 std::string base = fmt; in RepeatRI() local
160 std::string base = fmt; in RepeatI() local
/art/compiler/dex/quick/arm64/
Dint_arm64.cc470 uint64_t base = DecodeLogicalImmediate(/*is_wide*/true, magic_table[lit].magic64_base); in SmallLiteralDivRem64() local
1420 static void SpillCoreRegs(Arm64Mir2Lir* m2l, RegStorage base, int offset, uint32_t reg_mask) { in SpillCoreRegs()
1436 static void SpillFPRegs(Arm64Mir2Lir* m2l, RegStorage base, int offset, uint32_t reg_mask) { in SpillFPRegs()
1452 static int SpillRegsPreSub(Arm64Mir2Lir* m2l, RegStorage base, uint32_t core_reg_mask, in SpillRegsPreSub()
1474 static int SpillRegsPreIndexed(Arm64Mir2Lir* m2l, RegStorage base, uint32_t core_reg_mask, in SpillRegsPreIndexed()
1589 int Arm64Mir2Lir::SpillRegs(RegStorage base, uint32_t core_reg_mask, uint32_t fp_reg_mask, in SpillRegs()
1604 static void UnSpillCoreRegs(Arm64Mir2Lir* m2l, RegStorage base, int offset, uint32_t reg_mask) { in UnSpillCoreRegs()
1620 static void UnSpillFPRegs(Arm64Mir2Lir* m2l, RegStorage base, int offset, uint32_t reg_mask) { in UnSpillFPRegs()
1636 void Arm64Mir2Lir::UnspillRegs(RegStorage base, uint32_t core_reg_mask, uint32_t fp_reg_mask, in UnspillRegs()
/art/compiler/
Delf_patcher.cc148 uint8_t* base = reinterpret_cast<uint8_t*>(reinterpret_cast<uintptr_t>(quick_oat_code) & ~0x1); in SetPatchLocation() local
244 uintptr_t base = reinterpret_cast<uintptr_t>(quick_oat_code); in PatchElf() local
Dcommon_compiler_test.cc147 const byte* base = reinterpret_cast<const byte*>(code); // Base of data points at code. in CreateOatMethod() local
249 uintptr_t base = RoundDown(data, kPageSize); in MakeExecutable() local
/art/compiler/utils/mips/
Dassembler_mips.cc477 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base, in LoadFromOffset()
503 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) { in LoadSFromOffset()
507 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_t offset) { in LoadDFromOffset()
511 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base, in StoreToOffset()
531 void MipsAssembler::StoreFToOffset(FRegister reg, Register base, int32_t offset) { in StoreFToOffset()
535 void MipsAssembler::StoreDToOffset(DRegister reg, Register base, int32_t offset) { in StoreDToOffset()
683 void MipsAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base, in LoadRef()
694 void MipsAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, in LoadRawPtr()
906 MipsManagedRegister base = mbase.AsMips(); in Call() local
916 void MipsAssembler::Call(FrameOffset base, Offset offset, ManagedRegister mscratch) { in Call()
/art/test/072-precise-gc/src/
DMain.java61 static String generateString(String base, int num) { in generateString()
/art/test/003-omnibus-opcodes/src/
DMethodCall.java56 MethodCallBase base = inst; in run() local
/art/compiler/dex/
Dlocal_value_numbering.cc71 uint16_t field_id, uint16_t base, uint16_t memory_version) { in LookupGlobalValue()
76 uint16_t field_id, uint16_t base) { in LookupMergeValue()
103 uint16_t field_id, uint16_t base) { in LookupMergeLocationValue()
1007 uint16_t base = GetOperandValue(mir->ssa_rep->uses[0]); in HandlePutObject() local
1011 void LocalValueNumbering::HandleEscapingRef(uint16_t base) { in HandleEscapingRef()
1144 uint16_t base = GetOperandValue(mir->ssa_rep->uses[0]); in HandleIGet() local
1181 uint16_t base = GetOperandValue(mir->ssa_rep->uses[base_reg]); in HandleIPut() local
Dlocal_value_numbering.h167 uint16_t base; // Or array. member
197 uint16_t base; member
Dglobal_value_numbering.cc168 uint16_t GlobalValueNumbering::GetArrayLocation(uint16_t base, uint16_t index) { in GetArrayLocation()
/art/runtime/
Dmonitor_pool.h121 uintptr_t base = *(monitor_chunks_.LoadRelaxed()+index); in LookupMonitor() local
/art/compiler/utils/arm/
Dassembler_arm.cc503 void ArmAssembler::LoadRef(ManagedRegister mdest, ManagedRegister base, in LoadRef()
520 void ArmAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, in LoadRawPtr()
776 ArmManagedRegister base = mbase.AsArm(); in Call() local
786 void ArmAssembler::Call(FrameOffset base, Offset offset, in Call()
Dassembler_arm32.cc264 Register base, in ldm()
272 Register base, in stm()
601 Register base, in EmitMultiMemOp()
1327 Register base, in LoadFromOffset()
1366 Register base, in LoadSFromOffset()
1384 Register base, in LoadDFromOffset()
1403 Register base, in StoreToOffset()
1437 Register base, in StoreSToOffset()
1455 Register base, in StoreDToOffset()
Dassembler_thumb2.cc318 Register base, in ldm()
341 Register base, in stm()
1410 Register base, in EmitMultiMemOp()
2377 Register base, in LoadFromOffset()
2416 Register base, in LoadSFromOffset()
2434 Register base, in LoadDFromOffset()
2453 Register base, in StoreToOffset()
2487 Register base, in StoreSToOffset()
2505 Register base, in StoreDToOffset()
/art/runtime/arch/x86/
Dthread_x86.cc47 const uintptr_t base = reinterpret_cast<uintptr_t>(this); in InitCpu() local
/art/compiler/llvm/
Dir_builder.h219 ::llvm::Value* CreatePtrDisp(::llvm::Value* base, in CreatePtrDisp()
229 ::llvm::Value* CreatePtrDisp(::llvm::Value* base, in CreatePtrDisp()
/art/compiler/dex/quick/x86/
Dassemble_x86.cc846 static uint8_t ModrmForDisp(int base, int disp) { in ModrmForDisp()
969 void X86Mir2Lir::EmitDisp(uint8_t base, int32_t disp) { in EmitDisp()
996 void X86Mir2Lir::EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp) { in EmitModrmDisp()
1008 void X86Mir2Lir::EmitModrmSibDisp(uint8_t reg_or_opcode, uint8_t base, uint8_t index, in EmitModrmSibDisp()

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