1 /*
2  * Copyright © 2008 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 /**
29  * @file intel_bufmgr_priv.h
30  *
31  * Private definitions of Intel-specific bufmgr functions and structures.
32  */
33 
34 #ifndef INTEL_BUFMGR_PRIV_H
35 #define INTEL_BUFMGR_PRIV_H
36 
37 /**
38  * Context for a buffer manager instance.
39  *
40  * Contains public methods followed by private storage for the buffer manager.
41  */
42 struct _drm_intel_bufmgr {
43    /**
44     * Allocate a buffer object.
45     *
46     * Buffer objects are not necessarily initially mapped into CPU virtual
47     * address space or graphics device aperture.  They must be mapped using
48     * bo_map() to be used by the CPU, and validated for use using bo_validate()
49     * to be used from the graphics device.
50     */
51    drm_intel_bo *(*bo_alloc)(drm_intel_bufmgr *bufmgr, const char *name,
52 			     unsigned long size, unsigned int alignment);
53 
54    /**
55     * Allocate a buffer object, hinting that it will be used as a render target.
56     *
57     * This is otherwise the same as bo_alloc.
58     */
59    drm_intel_bo *(*bo_alloc_for_render)(drm_intel_bufmgr *bufmgr,
60 					const char *name,
61 					unsigned long size,
62 					unsigned int alignment);
63 
64    /** Takes a reference on a buffer object */
65    void (*bo_reference)(drm_intel_bo *bo);
66 
67    /**
68     * Releases a reference on a buffer object, freeing the data if
69     * rerefences remain.
70     */
71    void (*bo_unreference)(drm_intel_bo *bo);
72 
73    /**
74     * Maps the buffer into userspace.
75     *
76     * This function will block waiting for any existing execution on the
77     * buffer to complete, first.  The resulting mapping is available at
78     * buf->virtual.
79     */
80    int (*bo_map)(drm_intel_bo *bo, int write_enable);
81 
82    /** Reduces the refcount on the userspace mapping of the buffer object. */
83    int (*bo_unmap)(drm_intel_bo *bo);
84 
85    /**
86     * Write data into an object.
87     *
88     * This is an optional function, if missing,
89     * drm_intel_bo will map/memcpy/unmap.
90     */
91    int (*bo_subdata)(drm_intel_bo *bo, unsigned long offset,
92 		     unsigned long size, const void *data);
93 
94    /**
95     * Read data from an object
96     *
97     * This is an optional function, if missing,
98     * drm_intel_bo will map/memcpy/unmap.
99     */
100    int (*bo_get_subdata)(drm_intel_bo *bo, unsigned long offset,
101 			 unsigned long size, void *data);
102 
103    /**
104     * Waits for rendering to an object by the GPU to have completed.
105     *
106     * This is not required for any access to the BO by bo_map, bo_subdata, etc.
107     * It is merely a way for the driver to implement glFinish.
108     */
109    void (*bo_wait_rendering)(drm_intel_bo *bo);
110 
111    /**
112     * Tears down the buffer manager instance.
113     */
114    void (*destroy)(drm_intel_bufmgr *bufmgr);
115 
116     /**
117      * Add relocation entry in reloc_buf, which will be updated with the
118      * target buffer's real offset on on command submission.
119      *
120      * Relocations remain in place for the lifetime of the buffer object.
121      *
122      * \param bo Buffer to write the relocation into.
123      * \param offset Byte offset within reloc_bo of the pointer to target_bo.
124      * \param target_bo Buffer whose offset should be written into the
125      *                  relocation entry.
126      * \param target_offset Constant value to be added to target_bo's offset in
127      *	                    relocation entry.
128      * \param read_domains GEM read domains which the buffer will be read into
129      *	      by the command that this relocation is part of.
130      * \param write_domains GEM read domains which the buffer will be dirtied
131      *	      in by the command that this relocation is part of.
132      */
133     int (*bo_emit_reloc)(drm_intel_bo *bo, uint32_t offset,
134 			 drm_intel_bo *target_bo, uint32_t target_offset,
135 			 uint32_t read_domains, uint32_t write_domain);
136 
137     /** Executes the command buffer pointed to by bo. */
138     int (*bo_exec)(drm_intel_bo *bo, int used,
139 		   drm_clip_rect_t *cliprects, int num_cliprects,
140 		   int DR4);
141 
142     /**
143      * Pin a buffer to the aperture and fix the offset until unpinned
144      *
145      * \param buf Buffer to pin
146      * \param alignment Required alignment for aperture, in bytes
147      */
148     int (*bo_pin)(drm_intel_bo *bo, uint32_t alignment);
149     /**
150      * Unpin a buffer from the aperture, allowing it to be removed
151      *
152      * \param buf Buffer to unpin
153      */
154     int (*bo_unpin)(drm_intel_bo *bo);
155     /**
156      * Ask that the buffer be placed in tiling mode
157      *
158      * \param buf Buffer to set tiling mode for
159      * \param tiling_mode desired, and returned tiling mode
160      */
161     int (*bo_set_tiling)(drm_intel_bo *bo, uint32_t *tiling_mode,
162 			 uint32_t stride);
163     /**
164      * Get the current tiling (and resulting swizzling) mode for the bo.
165      *
166      * \param buf Buffer to get tiling mode for
167      * \param tiling_mode returned tiling mode
168      * \param swizzle_mode returned swizzling mode
169      */
170     int (*bo_get_tiling)(drm_intel_bo *bo, uint32_t *tiling_mode,
171 			 uint32_t *swizzle_mode);
172     /**
173      * Create a visible name for a buffer which can be used by other apps
174      *
175      * \param buf Buffer to create a name for
176      * \param name Returned name
177      */
178     int (*bo_flink)(drm_intel_bo *bo, uint32_t *name);
179 
180     /**
181      * Returns 1 if mapping the buffer for write could cause the process
182      * to block, due to the object being active in the GPU.
183      */
184     int (*bo_busy)(drm_intel_bo *bo);
185 
186     int (*check_aperture_space)(drm_intel_bo **bo_array, int count);
187 
188     /**
189      * Disable buffer reuse for buffers which will be shared in some way,
190      * as with scanout buffers. When the buffer reference count goes to zero,
191      * it will be freed and not placed in the reuse list.
192      *
193      * \param bo Buffer to disable reuse for
194      */
195     int (*bo_disable_reuse)(drm_intel_bo *bo);
196 
197     /**
198      *
199      * Return the pipe associated with a crtc_id so that vblank
200      * synchronization can use the correct data in the request.
201      * This is only supported for KMS and gem at this point, when
202      * unsupported, this function returns -1 and leaves the decision
203      * of what to do in that case to the caller
204      *
205      * \param bufmgr the associated buffer manager
206      * \param crtc_id the crtc identifier
207      */
208     int (*get_pipe_from_crtc_id)(drm_intel_bufmgr *bufmgr, int crtc_id);
209 
210     int debug; /**< Enables verbose debugging printouts */
211 };
212 
213 #endif /* INTEL_BUFMGR_PRIV_H */
214 
215