Searched defs:src2 (Results 1 – 11 of 11) sorted by relevance
| /art/compiler/dex/quick/ |
| D | mir_to_lir-inl.h | 109 inline LIR* Mir2Lir::NewLIR3(int opcode, int dest, int src1, int src2) { in NewLIR3()
119 inline LIR* Mir2Lir::NewLIR4(int opcode, int dest, int src1, int src2, int info) { in NewLIR4()
129 inline LIR* Mir2Lir::NewLIR5(int opcode, int dest, int src1, int src2, int info1, in NewLIR5()
|
| D | codegen_util.cc | 934 bool Mir2Lir::EvaluateBranch(Instruction::Code opcode, int32_t src1, int32_t src2) { in EvaluateBranch()
|
| /art/runtime/arch/arm64/ |
| D | memcmp16_arm64.S | 29 #define src2 x1 macro
|
| /art/compiler/dex/portable/ |
| D | mir_to_gbc.cc | 314 ::llvm::Value* src1, ::llvm::Value* src2) { in ConvertCompare()
364 ::llvm::Value* src1, ::llvm::Value* src2) { in GenDivModOp()
387 ::llvm::Value* src1, ::llvm::Value* src2) { in GenArithOp()
|
| /art/compiler/dex/ |
| D | ssa_transformation.cc | 439 const ArenaBitVector* src2) { in ComputeSuccLineIn()
|
| D | global_value_numbering_test.cc | 128 #define DEF_PHI2(bb, reg, src1, src2) \ argument
|
| /art/compiler/dex/quick/mips/ |
| D | int_mips.cc | 65 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
|
| /art/compiler/dex/quick/arm/ |
| D | int_arm.cc | 28 LIR* ArmMir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
|
| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 29 LIR* Arm64Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
|
| /art/compiler/dex/quick/x86/ |
| D | int_x86.cc | 96 LIR* X86Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) { in OpCmpBranch()
|
| /art/runtime/ |
| D | debugger.cc | 1328 const uint16_t* src2 = reinterpret_cast<uint16_t*>(a->GetRawData(sizeof(uint16_t), 0)); in OutputArray() local
|