1 /*
2 * Copyright (c) 2014 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Kun Wang <kun.k.wang@intel.com>
26 *
27 */
28
29 #include "vsp_VPP.h"
30 #include "vsp_compose.h"
31 #include "psb_buffer.h"
32 #include "psb_surface.h"
33 #include "vsp_cmdbuf.h"
34 #include "psb_drv_debug.h"
35
36
37 #define INIT_DRIVER_DATA psb_driver_data_p driver_data = (psb_driver_data_p) ctx->pDriverData;
38 #define INIT_CONTEXT_VPP context_VPP_p ctx = (context_VPP_p) obj_context->format_data;
39 #define CONFIG(id) ((object_config_p) object_heap_lookup( &driver_data->config_heap, id ))
40 #define CONTEXT(id) ((object_context_p) object_heap_lookup( &driver_data->context_heap, id ))
41 #define BUFFER(id) ((object_buffer_p) object_heap_lookup( &driver_data->buffer_heap, id ))
42
43 #define SURFACE(id) ((object_surface_p) object_heap_lookup( &ctx->obj_context->driver_data->surface_heap, id ))
44
45 #define ALIGN_TO_128(value) ((value + 128 - 1) & ~(128 - 1))
46 #define ALIGN_TO_16(value) ((value + 16 - 1) & ~(16 - 1))
47
vsp_compose_process_pipeline_param(context_VPP_p ctx,object_context_p __maybe_unused obj_context,object_buffer_p obj_buffer)48 VAStatus vsp_compose_process_pipeline_param(context_VPP_p ctx, object_context_p __maybe_unused obj_context, object_buffer_p obj_buffer)
49 {
50
51 VAStatus vaStatus = VA_STATUS_SUCCESS;
52 vsp_cmdbuf_p cmdbuf = ctx->obj_context->vsp_cmdbuf;
53 VAProcPipelineParameterBuffer *pipeline_param = (VAProcPipelineParameterBuffer *)obj_buffer->buffer_data;
54 struct VssWiDi_ComposeSequenceParameterBuffer *cell_compose_param = NULL;
55 object_surface_p yuv_surface = NULL;
56 object_surface_p rgb_surface = NULL;
57 object_surface_p output_surface = NULL;
58 int yuv_width = 0, yuv_height = 0, yuv_stride = 0;
59 int rgb_width = 0, rgb_height = 0, rgb_stride = 0;
60 int out_width = 0, out_height = 0, out_stride = 0;
61
62 cell_compose_param = (struct VssWiDi_ComposeSequenceParameterBuffer *)cmdbuf->compose_param_p;
63
64 /* The END command */
65 if (pipeline_param->pipeline_flags & VA_PIPELINE_FLAG_END) {
66 vsp_cmdbuf_compose_end(cmdbuf);
67 /* Destory the VSP context */
68 vsp_cmdbuf_vpp_context(cmdbuf, VssGenDestroyContext, CONTEXT_COMPOSE_ID, 0);
69 goto out;
70 }
71
72 if (pipeline_param->num_additional_outputs <= 0 || !pipeline_param->additional_outputs) {
73 drv_debug_msg(VIDEO_DEBUG_ERROR, "there isn't RGB surface!\n");
74 vaStatus = VA_STATUS_ERROR_UNKNOWN;
75 goto out;
76 }
77
78 /* Init the VSP context */
79 if (ctx->obj_context->frame_count == 0)
80 vsp_cmdbuf_vpp_context(cmdbuf, VssGenInitializeContext, CONTEXT_COMPOSE_ID, VSP_APP_ID_WIDI_ENC);
81
82 yuv_surface = SURFACE(pipeline_param->surface);
83 if (yuv_surface == NULL) {
84 drv_debug_msg(VIDEO_DEBUG_ERROR, "invalid yuv surface %x\n", pipeline_param->surface);
85 vaStatus = VA_STATUS_ERROR_UNKNOWN;
86 goto out;
87 }
88
89 /* The RGB surface will be the first element */
90 rgb_surface = SURFACE(pipeline_param->additional_outputs[0]);
91 if (rgb_surface == NULL) {
92 drv_debug_msg(VIDEO_DEBUG_ERROR, "invalid RGB surface %x\n", pipeline_param->additional_outputs[0]);
93 vaStatus = VA_STATUS_ERROR_UNKNOWN;
94 goto out;
95 }
96
97 output_surface = ctx->obj_context->current_render_target;
98
99 yuv_width = ALIGN_TO_16(yuv_surface->width);
100 yuv_height = yuv_surface->height_origin;
101 yuv_stride = yuv_surface->psb_surface->stride;
102
103 out_width = ALIGN_TO_16(output_surface->width);
104 out_height = output_surface->height_origin;
105 out_stride = output_surface->psb_surface->stride;
106
107 rgb_width = ALIGN_TO_16(rgb_surface->width);
108 rgb_height = ALIGN_TO_16(rgb_surface->height);
109 rgb_stride = rgb_surface->psb_surface->stride;
110
111 /* RGB related */
112 cell_compose_param->ActualWidth = rgb_width;
113 cell_compose_param->ActualHeight = rgb_height;
114 cell_compose_param->ProcessedWidth = cell_compose_param->ActualWidth;
115 cell_compose_param->ProcessedHeight = cell_compose_param->ActualHeight;
116 cell_compose_param->TotalMBCount = ((cell_compose_param->ProcessedWidth >> 4) * (cell_compose_param->ProcessedHeight >> 4));
117 cell_compose_param->Stride = rgb_stride;
118 vsp_cmdbuf_reloc_pic_param(
119 &(cell_compose_param->RGBA_Buffer),
120 ctx->compose_param_offset,
121 &(rgb_surface->psb_surface->buf),
122 cmdbuf->param_mem_loc,
123 cell_compose_param);
124
125
126 /* Input YUV Video related */
127 cell_compose_param->Video_IN_xsize = yuv_width;
128 cell_compose_param->Video_IN_ysize = yuv_height;
129 cell_compose_param->Video_IN_stride = yuv_stride;
130 cell_compose_param->Video_IN_yuv_format = YUV_4_2_0_NV12;
131 vsp_cmdbuf_reloc_pic_param(
132 &(cell_compose_param->Video_IN_Y_Buffer),
133 ctx->compose_param_offset,
134 &(yuv_surface->psb_surface->buf),
135 cmdbuf->param_mem_loc,
136 cell_compose_param);
137
138 cell_compose_param->Video_IN_UV_Buffer =
139 cell_compose_param->Video_IN_Y_Buffer +
140 cell_compose_param->Video_IN_ysize * cell_compose_param->Video_IN_stride;
141
142 /* Output Video related */
143 cell_compose_param->Video_OUT_xsize = out_width;
144 cell_compose_param->Video_OUT_ysize = out_height;
145 cell_compose_param->Video_OUT_stride = out_stride;
146 cell_compose_param->Video_OUT_yuv_format = cell_compose_param->Video_IN_yuv_format;
147 vsp_cmdbuf_reloc_pic_param(
148 &(cell_compose_param->Video_OUT_Y_Buffer),
149 ctx->compose_param_offset,
150 &(output_surface->psb_surface->buf),
151 cmdbuf->param_mem_loc,
152 cell_compose_param);
153
154 cell_compose_param->Video_OUT_UV_Buffer =
155 cell_compose_param->Video_OUT_Y_Buffer +
156 cell_compose_param->Video_OUT_ysize * cell_compose_param->Video_OUT_stride;
157
158 /* Blending related params */
159 cell_compose_param->Is_video_the_back_ground = 1;
160 if (cell_compose_param->Is_video_the_back_ground) {
161 cell_compose_param->ROI_width = cell_compose_param->ProcessedWidth;
162 cell_compose_param->ROI_height = cell_compose_param->ProcessedHeight;
163 cell_compose_param->ROI_x1 = 0;
164 cell_compose_param->ROI_y1 = 0;
165 cell_compose_param->ROI_x2 = 0;
166 cell_compose_param->ROI_y2 = 0;
167
168 } else {
169 cell_compose_param->ROI_width = cell_compose_param->Video_IN_xsize;
170 cell_compose_param->ROI_height = cell_compose_param->Video_IN_ysize;
171 cell_compose_param->ROI_x1 = 0;
172 cell_compose_param->ROI_y1 = 0;
173 cell_compose_param->ROI_x2 = 0;
174 cell_compose_param->ROI_y2 = 0;
175 }
176
177 cell_compose_param->scaled_width = out_width;
178 cell_compose_param->scaled_height = out_height;
179 cell_compose_param->scalefactor_dx = (unsigned int)(1024 / (((float)out_width) / yuv_width) + 0.5);
180 cell_compose_param->scalefactor_dy = (unsigned int)(1024 / (((float)out_height) / yuv_height) + 0.5);
181 cell_compose_param->Video_TotalMBCount =
182 (((out_width + 15) >> 4) * ((out_height + 15) >> 4));
183
184 cell_compose_param->ROI_width = cell_compose_param->scaled_width;
185 cell_compose_param->ROI_height = cell_compose_param->scaled_height;
186
187 cell_compose_param->Is_Blending_Enabled = 1;
188 cell_compose_param->alpha1 = 128;
189 cell_compose_param->alpha2 = 255;
190 cell_compose_param->Is_source_1_image_available = 1;
191 cell_compose_param->Is_source_2_image_available = 1;
192 cell_compose_param->Is_alpha_channel_available = 1; /* 0: RGB Planar; 1: RGBA Interleaved */
193 cell_compose_param->CSC_FormatSelect = 0; /* 0: YUV420NV12; 1: YUV444; */
194 cell_compose_param->CSC_InputFormatSelect = 1; /* 0: RGB Planar; 1: RGBA Interleaved */
195
196 /* The first frame */
197 if (obj_context->frame_count == 0) {
198 vsp_cmdbuf_insert_command(cmdbuf,
199 CONTEXT_COMPOSE_ID,
200 &cmdbuf->param_mem,
201 VssWiDi_ComposeSetSequenceParametersCommand,
202 ctx->compose_param_offset,
203 sizeof(struct VssWiDi_ComposeSequenceParameterBuffer));
204 }
205
206 vsp_cmdbuf_insert_command(cmdbuf,
207 CONTEXT_COMPOSE_ID,
208 &cmdbuf->param_mem,
209 VssWiDi_ComposeFrameCommand,
210 ctx->compose_param_offset,
211 sizeof(struct VssWiDi_ComposeSequenceParameterBuffer));
212
213 /* Insert Fence Command */
214 vsp_cmdbuf_fence_compose_param(cmdbuf, wsbmKBufHandle(wsbmKBuf(cmdbuf->param_mem.drm_buf)));
215
216 out:
217 free(pipeline_param);
218 obj_buffer->buffer_data = NULL;
219 obj_buffer->size = 0;
220
221 return vaStatus;
222 }
223