/art/compiler/optimizing/ |
D | code_generator_arm.cc | 464 __ LoadImmediate(location.AsArm().AsCoreRegister(), value); in Move() local 467 __ LoadImmediate(IP, value); in Move() local 473 __ LoadImmediate(location.AsArm().AsRegisterPairLow(), Low32Bits(value)); in Move() local 474 __ LoadImmediate(location.AsArm().AsRegisterPairHigh(), High32Bits(value)); in Move() local 477 __ LoadImmediate(IP, Low32Bits(value)); in Move() local 479 __ LoadImmediate(IP, High32Bits(value)); in Move() local 583 __ LoadImmediate(temp, value); in VisitIf() local 622 __ LoadImmediate(temp, value); in VisitCondition() local 1000 __ LoadImmediate(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex()); in VisitNewInstance() local 1062 __ LoadImmediate(output, 0); in VisitCompare() local [all …]
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/art/compiler/utils/arm64/ |
D | assembler_arm64.cc | 157 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToFrame() 166 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToThread64() 196 void Arm64Assembler::LoadImmediate(Register dest, int32_t value, in LoadImmediate() function in art::arm64::Arm64Assembler 560 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); in CreateHandleScopeEntry() 596 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); in LoadReferenceFromHandleScope()
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D | assembler_arm64.h | 228 void LoadImmediate(Register dest, int32_t value, Condition cond = AL);
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/art/compiler/utils/arm/ |
D | assembler_arm.cc | 532 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToFrame() 540 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToThread32() 719 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); in CreateHandleScopeEntry() 758 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); // TODO: why EQ? in LoadReferenceFromHandleScope()
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D | assembler_arm32.cc | 1307 void Arm32Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { in LoadImmediate() function in art::arm::Arm32Assembler 1332 LoadImmediate(IP, offset, cond); in LoadFromOffset() 1371 LoadImmediate(IP, offset, cond); in LoadSFromOffset() 1389 LoadImmediate(IP, offset, cond); in LoadDFromOffset() 1409 LoadImmediate(IP, offset, cond); in StoreToOffset() 1442 LoadImmediate(IP, offset, cond); in StoreSToOffset() 1460 LoadImmediate(IP, offset, cond); in StoreDToOffset()
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D | assembler_thumb2.cc | 2358 void Thumb2Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { in LoadImmediate() function in art::arm::Thumb2Assembler 2382 LoadImmediate(IP, offset, cond); in LoadFromOffset() 2421 LoadImmediate(IP, offset, cond); in LoadSFromOffset() 2439 LoadImmediate(IP, offset, cond); in LoadDFromOffset() 2459 LoadImmediate(IP, offset, cond); in StoreToOffset() 2492 LoadImmediate(IP, offset, cond); in StoreSToOffset() 2510 LoadImmediate(IP, offset, cond); in StoreDToOffset()
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D | assembler_arm32.h | 243 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
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D | assembler_thumb2.h | 273 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
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D | assembler_arm.h | 541 virtual void LoadImmediate(Register rd, int32_t value, Condition cond = AL) = 0;
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/art/compiler/utils/mips/ |
D | assembler_mips.cc | 453 void MipsAssembler::LoadImmediate(Register rt, int32_t value) { in LoadImmediate() function in art::mips::MipsAssembler 634 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToFrame() 642 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToThread32() 848 LoadImmediate(out_reg.AsCoreRegister(), 0); in CreateHandleScopeEntry() 889 LoadImmediate(out_reg.AsCoreRegister(), 0); in LoadReferenceFromHandleScope()
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D | assembler_mips.h | 138 void LoadImmediate(Register rt, int32_t value);
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