| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 597 RegLocation Arm64Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) { in GenDivRemLit() argument
605 rl_result = GenDivRem(rl_result, reg1, lit_temp, is_div); in GenDivRemLit()
1399 static uint32_t GenPairWise(uint32_t reg_mask, int* reg1, int* reg2) { in GenPairWise() argument
1402 int reg = *reg1 + first_bit_set; in GenPairWise()
1410 *reg1 = reg + second_bit_set; in GenPairWise()
1415 *reg1 = reg; in GenPairWise()
1421 int reg1 = -1, reg2 = -1; in SpillCoreRegs() local
1425 reg_mask = GenPairWise(reg_mask, & reg1, & reg2); in SpillCoreRegs()
1427 m2l->NewLIR3(WIDE(kA64Str3rXD), RegStorage::Solo64(reg1).GetReg(), base.GetReg(), offset); in SpillCoreRegs()
1430 RegStorage::Solo64(reg1).GetReg(), base.GetReg(), offset); in SpillCoreRegs()
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| /art/compiler/dex/ |
| D | reg_storage.h | 279 static constexpr bool SameRegType(RegStorage reg1, RegStorage reg2) { in SameRegType() argument
280 return ((reg1.reg_ & kShapeTypeMask) == (reg2.reg_ & kShapeTypeMask)); in SameRegType()
283 static constexpr bool SameRegType(int reg1, int reg2) { in SameRegType() argument
284 return ((reg1 & kShapeTypeMask) == (reg2 & kShapeTypeMask)); in SameRegType()
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| /art/compiler/dex/quick/mips/ |
| D | int_mips.cc | 238 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStorage reg2, in GenDivRem() argument
240 NewLIR2(kMipsDiv, reg1.GetReg(), reg2.GetReg()); in GenDivRem()
250 RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, in GenDivRemLit() argument
254 NewLIR2(kMipsDiv, reg1.GetReg(), t_reg.GetReg()); in GenDivRemLit()
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| /art/compiler/utils/ |
| D | assembler_test.h | 83 for (auto reg1 : registers) { in RepeatRR() local
85 (assembler_.get()->*f)(*reg1, *reg2); in RepeatRR()
91 sreg << *reg1; in RepeatRR()
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| /art/compiler/utils/x86/ |
| D | assembler_x86.h | 341 void cmpl(Register reg0, Register reg1);
347 void testl(Register reg1, Register reg2);
349 void testl(Register reg1, const Address& address);
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| D | assembler_x86.cc | 761 void X86Assembler::cmpl(Register reg0, Register reg1) { in cmpl() argument
764 EmitOperand(reg0, Operand(reg1)); in cmpl()
802 void X86Assembler::testl(Register reg1, Register reg2) { in testl() argument
805 EmitRegisterOperand(reg1, reg2); in testl()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 848 void X86_64Assembler::cmpl(CpuRegister reg0, CpuRegister reg1) { in cmpl() argument
850 EmitOptionalRex32(reg0, reg1); in cmpl()
852 EmitOperand(reg0.LowBits(), Operand(reg1)); in cmpl()
864 void X86_64Assembler::cmpq(CpuRegister reg0, CpuRegister reg1) { in cmpq() argument
866 EmitRex64(reg0, reg1); in cmpq()
868 EmitOperand(reg0.LowBits(), Operand(reg1)); in cmpq()
919 void X86_64Assembler::testl(CpuRegister reg1, CpuRegister reg2) { in testl() argument
921 EmitOptionalRex32(reg1, reg2); in testl()
923 EmitRegisterOperand(reg1.LowBits(), reg2.LowBits()); in testl()
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| D | assembler_x86_64.h | 382 void cmpl(CpuRegister reg0, CpuRegister reg1);
387 void cmpq(CpuRegister reg0, CpuRegister reg1);
391 void testl(CpuRegister reg1, CpuRegister reg2);
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| /art/compiler/dex/quick/arm/ |
| D | int_arm.cc | 695 RegLocation ArmMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) { in GenDivRemLit() argument
703 rl_result = GenDivRem(rl_result, reg1, lit_temp, is_div); in GenDivRemLit()
709 RegLocation ArmMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStorage reg2, in GenDivRem() argument
714 OpRegRegReg(kOpDiv, rl_result.reg, reg1, reg2); in GenDivRem()
722 OpRegRegReg(kOpDiv, temp, reg1, reg2); in GenDivRem()
724 OpRegRegReg(kOpSub, rl_result.reg, reg1, temp); in GenDivRem()
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| /art/compiler/utils/arm/ |
| D | assembler_arm.h | 736 static int RegisterCompare(const Register* reg1, const Register* reg2) { in RegisterCompare() argument
737 return *reg1 - *reg2; in RegisterCompare()
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| /art/compiler/dex/quick/ |
| D | mir_to_lir.h | 1163 bool IsSameReg(RegStorage reg1, RegStorage reg2) { in IsSameReg() argument
1164 RegisterInfo* info1 = GetRegInfo(reg1); in IsSameReg()
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| /art/compiler/dex/quick/x86/ |
| D | codegen_x86.h | 814 void OpLea(RegStorage r_base, RegStorage reg1, RegStorage reg2, int scale, int offset);
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| D | int_x86.cc | 905 void X86Mir2Lir::OpLea(RegStorage r_base, RegStorage reg1, RegStorage reg2, int scale, int offset) { in OpLea() argument
906 NewLIR5(kX86Lea32RA, r_base.GetReg(), reg1.GetReg(), reg2.GetReg(), scale, offset); in OpLea()
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