| /art/compiler/utils/arm/ |
| D | assembler_arm32.h | 200 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
202 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
204 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
206 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
208 void Rrx(Register rd, Register rm, bool setcc = false,
211 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
213 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
215 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
217 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
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| D | assembler_thumb2.h | 231 void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
233 void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
235 void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
237 void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
239 void Rrx(Register rd, Register rm, bool setcc = false,
242 void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
244 void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
246 void Asr(Register rd, Register rm, Register rn, bool setcc = false,
248 void Ror(Register rd, Register rm, Register rn, bool setcc = false,
419 void EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc = false);
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| D | assembler_arm32.cc | 1043 bool setcc, Condition cond) { in Lsl() argument
1045 if (setcc) { in Lsl()
1054 bool setcc, Condition cond) { in Lsr() argument
1057 if (setcc) { in Lsr()
1066 bool setcc, Condition cond) { in Asr() argument
1069 if (setcc) { in Asr()
1078 bool setcc, Condition cond) { in Ror() argument
1080 if (setcc) { in Ror()
1087 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { in Rrx() argument
1088 if (setcc) { in Rrx()
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| D | assembler_thumb2.cc | 1092 void Thumb2Assembler::EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) { in EmitShift() argument
1107 0xf << 16 | (setcc ? B20 : 0); in EmitShift()
1129 void Thumb2Assembler::EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) { in EmitShift() argument
1148 0xf << 12 | (setcc ? B20 : 0); in EmitShift()
2156 bool setcc, Condition cond) { in Lsl() argument
2159 EmitShift(rd, rm, LSL, shift_imm, setcc); in Lsl()
2164 bool setcc, Condition cond) { in Lsr() argument
2168 EmitShift(rd, rm, LSR, shift_imm, setcc); in Lsr()
2173 bool setcc, Condition cond) { in Asr() argument
2177 EmitShift(rd, rm, ASR, shift_imm, setcc); in Asr()
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| D | assembler_arm.h | 583 virtual void Lsl(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
585 virtual void Lsr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
587 virtual void Asr(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
589 virtual void Ror(Register rd, Register rm, uint32_t shift_imm, bool setcc = false,
591 virtual void Rrx(Register rd, Register rm, bool setcc = false,
594 virtual void Lsl(Register rd, Register rm, Register rn, bool setcc = false,
596 virtual void Lsr(Register rd, Register rm, Register rn, bool setcc = false,
598 virtual void Asr(Register rd, Register rm, Register rn, bool setcc = false,
600 virtual void Ror(Register rd, Register rm, Register rn, bool setcc = false,
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64_test.cc | 217 assembler->setcc(static_cast<x86_64::Condition>(i), *reg); in setcc_test_fn()
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| D | assembler_x86_64.h | 474 void setcc(Condition condition, CpuRegister dst);
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| D | assembler_x86_64.cc | 1444 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc() function in art::x86_64::X86_64Assembler
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 493 __ setcc(X86_64Condition(comp->GetCondition()), in VisitCondition() local
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