Searched refs:spill (Results 1 – 9 of 9) sorted by relevance
| /art/compiler/utils/ |
| D | managed_register.h | 115 ManagedRegisterSpill spill(__x); in push_back()
116 std::vector<ManagedRegisterSpill>::push_back(spill); in push_back()
120 ManagedRegisterSpill spill(__x, __size); in push_back()
121 std::vector<ManagedRegisterSpill>::push_back(spill); in push_back()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 1725 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); in BuildFrame() local
1726 if (spill.IsCpuRegister()) { in BuildFrame()
1727 pushq(spill.AsCpuRegister()); in BuildFrame()
1739 x86_64::X86_64ManagedRegister spill = spill_regs.at(i).AsX86_64(); in BuildFrame() local
1740 if (spill.IsXmmRegister()) { in BuildFrame()
1742 movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame()
1751 ManagedRegisterSpill spill = entry_spills.at(i); in BuildFrame() local
1752 if (spill.AsX86_64().IsCpuRegister()) { in BuildFrame()
1753 if (spill.getSize() == 8) { in BuildFrame()
1754 movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame()
[all …]
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| D | assembler_x86_64_test.cc | 247 ManagedRegisterSpill spill(ManagedFromCpu(x86_64::RAX), 8, 0); in buildframe_test_fn() local
248 entry_spills.push_back(spill); in buildframe_test_fn()
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| /art/runtime/arch/arm/ |
| D | jni_entrypoints_arm.S | 24 push {r0, r1, r2, r3, lr} @ spill regs
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| D | portable_entrypoints_arm.S | 30 push {r0, r4, r5, r9, r11, lr} @ spill regs
61 pop {r0, r4, r5, r9, r11, lr} @ restore spill regs
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| D | quick_entrypoints_arm.S | 295 push {r0, r4, r5, r9, r11, lr} @ spill regs
330 pop {r0, r4, r5, r9, r11, lr} @ restore spill regs
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| /art/compiler/jni/quick/x86_64/ |
| D | calling_convention_x86_64.cc | 113 ManagedRegisterSpill spill(in_reg, size, spill_offset); in EntrySpills() local
114 entry_spills_.push_back(spill); in EntrySpills()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 695 ManagedRegisterSpill spill = entry_spills.at(i); in BuildFrame() local
696 offset += spill.getSize(); in BuildFrame()
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| /art/runtime/arch/mips/ |
| D | quick_entrypoints_mips.S | 484 addiu $sp, $sp, -16 # spill s0, s1, fp, ra
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