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Searched refs:REGSZ (Results 1 – 14 of 14) sorted by relevance

/bionic/libc/arch-mips64/include/machine/
Dsignal.h40 #define SC_REGMASK (0*REGSZ)
41 #define SC_STATUS (1*REGSZ)
42 #define SC_PC (2*REGSZ)
46 #define SC_USED_MATH (SC_ACX+3*REGSZ)
Dasm.h116 #define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
133 #define REGSZ 4 /* 32 bit mode register size */ macro
143 #define REGSZ 8 /* 64 bit mode register size */ macro
/bionic/libc/arch-mips/include/machine/
Dsignal.h40 #define SC_REGMASK (0*REGSZ)
41 #define SC_STATUS (1*REGSZ)
42 #define SC_PC (2*REGSZ)
46 #define SC_USED_MATH (SC_ACX+3*REGSZ)
Dasm.h116 #define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
133 #define REGSZ 4 /* 32 bit mode register size */ macro
143 #define REGSZ 8 /* 64 bit mode register size */ macro
/bionic/libc/arch-mips/bionic/
D_setjmp.S45 GPOFF= FRAMESZ-2*REGSZ
57 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
58 REG_S s0, SC_REGS+S0*REGSZ(a0)
59 REG_S s1, SC_REGS+S1*REGSZ(a0)
60 REG_S s2, SC_REGS+S2*REGSZ(a0)
61 REG_S s3, SC_REGS+S3*REGSZ(a0)
62 REG_S s4, SC_REGS+S4*REGSZ(a0)
63 REG_S s5, SC_REGS+S5*REGSZ(a0)
64 REG_S s6, SC_REGS+S6*REGSZ(a0)
65 REG_S s7, SC_REGS+S7*REGSZ(a0)
[all …]
Dsetjmp.S43 A1OFF= FRAMESZ-4*REGSZ
44 A0OFF= FRAMESZ-3*REGSZ
45 GPOFF= FRAMESZ-2*REGSZ
46 RAOFF= FRAMESZ-1*REGSZ
71 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
72 REG_S s0, SC_REGS+S0*REGSZ(a0)
73 REG_S s1, SC_REGS+S1*REGSZ(a0)
74 REG_S s2, SC_REGS+S2*REGSZ(a0)
75 REG_S s3, SC_REGS+S3*REGSZ(a0)
76 REG_S s4, SC_REGS+S4*REGSZ(a0)
[all …]
Dsigsetjmp.S43 GPOFF= FRAMESZ-2*REGSZ
49 REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
66 REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"
/bionic/libc/arch-mips64/bionic/
D_setjmp.S45 GPOFF= FRAMESZ-2*REGSZ
57 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
58 REG_S s0, SC_REGS+S0*REGSZ(a0)
59 REG_S s1, SC_REGS+S1*REGSZ(a0)
60 REG_S s2, SC_REGS+S2*REGSZ(a0)
61 REG_S s3, SC_REGS+S3*REGSZ(a0)
62 REG_S s4, SC_REGS+S4*REGSZ(a0)
63 REG_S s5, SC_REGS+S5*REGSZ(a0)
64 REG_S s6, SC_REGS+S6*REGSZ(a0)
65 REG_S s7, SC_REGS+S7*REGSZ(a0)
[all …]
Dsetjmp.S43 A1OFF= FRAMESZ-4*REGSZ
44 A0OFF= FRAMESZ-3*REGSZ
45 GPOFF= FRAMESZ-2*REGSZ
46 RAOFF= FRAMESZ-1*REGSZ
71 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
72 REG_S s0, SC_REGS+S0*REGSZ(a0)
73 REG_S s1, SC_REGS+S1*REGSZ(a0)
74 REG_S s2, SC_REGS+S2*REGSZ(a0)
75 REG_S s3, SC_REGS+S3*REGSZ(a0)
76 REG_S s4, SC_REGS+S4*REGSZ(a0)
[all …]
D__bionic_clone.S35 FRAME_ARG = 0*REGSZ
36 FRAME_FN = 1*REGSZ
39 FRAME_GP = FRAMESZ-1*REGSZ
40 FRAME_ARG = FRAMESZ-2*REGSZ
41 FRAME_FN = FRAMESZ-3*REGSZ
53 PTR_L t0,FRAMESZ+5*REGSZ(sp) # fn
54 PRL_L t1,FRAMESZ+6*REGSZ(sp) # arg
Dsyscall.S35 FRAME_GP = FRAMESZ-1*REGSZ
47 REG_L a3, FRAMESZ+4*REGSZ(sp)
48 REG_L t0, FRAMESZ+5*REGSZ(sp)
49 REG_L t1, FRAMESZ+6*REGSZ(sp)
50 REG_S t0, 4*REGSZ(sp)
51 REG_S t1, 5*REGSZ(sp)
Dsigsetjmp.S43 GPOFF= FRAMESZ-2*REGSZ
49 REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
66 REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"
Dvfork.S54 REG_S $0, 4*REGSZ(sp)
/bionic/linker/arch/mips64/
Dbegin.S116 PTR_SUBU sp, 4*REGSZ /* space for arg saves in linker_init */
120 PTR_ADDU sp, 4*REGSZ /* restore sp */