/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 111 setOperationAction(ISD::SUBE, VT, Expand); in InitAMDILLowering() 112 setOperationAction(ISD::SUBC, VT, Expand); in InitAMDILLowering() 113 setOperationAction(ISD::ADDE, VT, Expand); in InitAMDILLowering() 114 setOperationAction(ISD::ADDC, VT, Expand); in InitAMDILLowering() 116 setOperationAction(ISD::BR_JT, VT, Expand); in InitAMDILLowering() 117 setOperationAction(ISD::BRIND, VT, Expand); in InitAMDILLowering() 119 setOperationAction(ISD::SREM, VT, Expand); in InitAMDILLowering() 120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering() 130 setOperationAction(ISD::FP_ROUND_INREG, VT, Expand); in InitAMDILLowering() [all …]
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 111 setOperationAction(ISD::SUBE, VT, Expand); in InitAMDILLowering() 112 setOperationAction(ISD::SUBC, VT, Expand); in InitAMDILLowering() 113 setOperationAction(ISD::ADDE, VT, Expand); in InitAMDILLowering() 114 setOperationAction(ISD::ADDC, VT, Expand); in InitAMDILLowering() 116 setOperationAction(ISD::BR_JT, VT, Expand); in InitAMDILLowering() 117 setOperationAction(ISD::BRIND, VT, Expand); in InitAMDILLowering() 119 setOperationAction(ISD::SREM, VT, Expand); in InitAMDILLowering() 120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering() 130 setOperationAction(ISD::FP_ROUND_INREG, VT, Expand); in InitAMDILLowering() [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1086 setOperationAction(ISD::SDIV, MVT::i32, Expand); in HexagonTargetLowering() 1088 setOperationAction(ISD::SREM, MVT::i32, Expand); in HexagonTargetLowering() 1091 setOperationAction(ISD::SDIV, MVT::i64, Expand); in HexagonTargetLowering() 1093 setOperationAction(ISD::SREM, MVT::i64, Expand); in HexagonTargetLowering() 1096 setOperationAction(ISD::UDIV, MVT::i32, Expand); in HexagonTargetLowering() 1099 setOperationAction(ISD::UDIV, MVT::i64, Expand); in HexagonTargetLowering() 1102 setOperationAction(ISD::UREM, MVT::i32, Expand); in HexagonTargetLowering() 1105 setOperationAction(ISD::UREM, MVT::i64, Expand); in HexagonTargetLowering() 1108 setOperationAction(ISD::FDIV, MVT::f32, Expand); in HexagonTargetLowering() 1111 setOperationAction(ISD::FDIV, MVT::f64, Expand); in HexagonTargetLowering() [all …]
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 730 setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand); in initActions() 731 setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand); in initActions() 736 (MVT::SimpleValueType)VT, Expand); in initActions() 739 setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand); in initActions() 740 setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand); in initActions() 743 setOperationAction(ISD::FROUND, (MVT::SimpleValueType)VT, Expand); in initActions() 748 setOperationAction(ISD::FCOPYSIGN, (MVT::SimpleValueType)VT, Expand); in initActions() 750 (MVT::SimpleValueType)VT, Expand); in initActions() 752 (MVT::SimpleValueType)VT, Expand); in initActions() 754 (MVT::SimpleValueType)VT, Expand); in initActions() [all …]
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 86 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand); in MSP430TargetLowering() 87 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand); in MSP430TargetLowering() 90 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in MSP430TargetLowering() 98 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering() 99 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering() 100 setOperationAction(ISD::ROTL, MVT::i16, Expand); in MSP430TargetLowering() 101 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering() 105 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in MSP430TargetLowering() 108 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering() 111 setOperationAction(ISD::SELECT, MVT::i8, Expand); in MSP430TargetLowering() [all …]
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.cpp | 116 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in AMDGPUTargetLowering() 117 setOperationAction(ISD::BRIND, MVT::Other, Expand); in AMDGPUTargetLowering() 173 setTruncStoreAction(MVT::v4i32, MVT::v4i16, Expand); in AMDGPUTargetLowering() 175 setTruncStoreAction(MVT::i64, MVT::i16, Expand); in AMDGPUTargetLowering() 176 setTruncStoreAction(MVT::i64, MVT::i8, Expand); in AMDGPUTargetLowering() 177 setTruncStoreAction(MVT::i64, MVT::i1, Expand); in AMDGPUTargetLowering() 178 setTruncStoreAction(MVT::v2i64, MVT::v2i1, Expand); in AMDGPUTargetLowering() 179 setTruncStoreAction(MVT::v4i64, MVT::v4i1, Expand); in AMDGPUTargetLowering() 217 setLoadExtAction(ISD::EXTLOAD, MVT::v2i8, Expand); in AMDGPUTargetLowering() 218 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i8, Expand); in AMDGPUTargetLowering() [all …]
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D | SIISelLowering.cpp | 58 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in SITargetLowering() 59 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand); in SITargetLowering() 60 setCondCodeAction(ISD::SETUGE, MVT::f32, Expand); in SITargetLowering() 61 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); in SITargetLowering() 62 setCondCodeAction(ISD::SETULE, MVT::f32, Expand); in SITargetLowering() 63 setCondCodeAction(ISD::SETULT, MVT::f32, Expand); in SITargetLowering() 65 setCondCodeAction(ISD::SETONE, MVT::f64, Expand); in SITargetLowering() 66 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand); in SITargetLowering() 67 setCondCodeAction(ISD::SETUGE, MVT::f64, Expand); in SITargetLowering() 68 setCondCodeAction(ISD::SETUGT, MVT::f64, Expand); in SITargetLowering() [all …]
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D | R600ISelLowering.cpp | 45 setCondCodeAction(ISD::SETO, MVT::f32, Expand); in R600TargetLowering() 46 setCondCodeAction(ISD::SETUO, MVT::f32, Expand); in R600TargetLowering() 47 setCondCodeAction(ISD::SETLT, MVT::f32, Expand); in R600TargetLowering() 48 setCondCodeAction(ISD::SETLE, MVT::f32, Expand); in R600TargetLowering() 49 setCondCodeAction(ISD::SETOLT, MVT::f32, Expand); in R600TargetLowering() 50 setCondCodeAction(ISD::SETOLE, MVT::f32, Expand); in R600TargetLowering() 51 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in R600TargetLowering() 52 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand); in R600TargetLowering() 53 setCondCodeAction(ISD::SETUGE, MVT::f32, Expand); in R600TargetLowering() 54 setCondCodeAction(ISD::SETUGT, MVT::f32, Expand); in R600TargetLowering() [all …]
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/external/chromium_org/third_party/webrtc/modules/audio_coding/neteq/ |
D | expand_unittest.cc | 22 TEST(Expand, CreateAndDestroy) { in TEST() argument 28 Expand expand(&bgn, &sync_buffer, &random_vector, fs, channels); in TEST() 31 TEST(Expand, CreateUsingFactory) { in TEST() argument 38 Expand* expand = in TEST()
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D | expand.h | 32 class Expand { 34 Expand(BackgroundNoise* background_noise, in Expand() function 58 virtual ~Expand() {} in ~Expand() 172 DISALLOW_COPY_AND_ASSIGN(Expand); 179 virtual Expand* Create(BackgroundNoise* background_noise,
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D | normal.h | 28 class Expand; variable 37 Expand* expand) in Normal() 62 Expand* expand_;
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D | merge.h | 23 class Expand; variable 36 Merge(int fs_hz, size_t num_channels, Expand* expand, SyncBuffer* sync_buffer) in Merge() 100 Expand* expand_;
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D | decision_logic.h | 25 class Expand; variable 77 const Expand& expand, 136 const Expand& expand,
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D | expand.cc | 27 void Expand::Reset() { in Reset() 37 int Expand::Process(AudioMultiVector* output) { in Process() 280 void Expand::SetParametersForNormalAfterExpand() { in SetParametersForNormalAfterExpand() 286 void Expand::SetParametersForMergeAfterExpand() { in SetParametersForMergeAfterExpand() 292 void Expand::InitializeForAnExpandPeriod() { in InitializeForAnExpandPeriod() 306 bool Expand::TooManyExpands() { in TooManyExpands() 310 void Expand::AnalyzeSignal(int16_t* random_vector) { in AnalyzeSignal() 713 int16_t Expand::Correlation(const int16_t* input, size_t input_length, in Correlation() 780 void Expand::UpdateLagIndex() { in UpdateLagIndex() 791 Expand* ExpandFactory::Create(BackgroundNoise* background_noise, in Create() [all …]
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/external/chromium_org/v8/src/ |
D | regexp-macro-assembler-irregexp-inl.h | 26 Expand(); in Emit() 36 Expand(); in Emit16() 46 Expand(); in Emit8() 56 Expand(); in Emit32()
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/external/chromium_org/third_party/webrtc/modules/audio_coding/neteq/mock/ |
D | mock_expand.h | 20 class MockExpand : public Expand { 27 : Expand(background_noise, sync_buffer, random_vector, fs, num_channels) { in MockExpand() 50 Expand*(BackgroundNoise* background_noise,
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 130 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); in Mips16TargetLowering() 131 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); in Mips16TargetLowering() 132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering() 133 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering() 134 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand); in Mips16TargetLowering() 135 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in Mips16TargetLowering() 136 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand); in Mips16TargetLowering() 137 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand); in Mips16TargetLowering() 138 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering() 139 setOperationAction(ISD::ATOMIC_LOAD_MIN, MVT::i32, Expand); in Mips16TargetLowering() [all …]
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D | MipsISelLowering.cpp | 230 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); in MipsTargetLowering() 231 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in MipsTargetLowering() 281 setOperationAction(ISD::SDIV, MVT::i32, Expand); in MipsTargetLowering() 282 setOperationAction(ISD::SREM, MVT::i32, Expand); in MipsTargetLowering() 283 setOperationAction(ISD::UDIV, MVT::i32, Expand); in MipsTargetLowering() 284 setOperationAction(ISD::UREM, MVT::i32, Expand); in MipsTargetLowering() 285 setOperationAction(ISD::SDIV, MVT::i64, Expand); in MipsTargetLowering() 286 setOperationAction(ISD::SREM, MVT::i64, Expand); in MipsTargetLowering() 287 setOperationAction(ISD::UDIV, MVT::i64, Expand); in MipsTargetLowering() 288 setOperationAction(ISD::UREM, MVT::i64, Expand); in MipsTargetLowering() [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1381 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); in SparcTargetLowering() 1382 setLoadExtAction(ISD::EXTLOAD, MVT::f64, Expand); in SparcTargetLowering() 1388 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in SparcTargetLowering() 1389 setTruncStoreAction(MVT::f128, MVT::f32, Expand); in SparcTargetLowering() 1390 setTruncStoreAction(MVT::f128, MVT::f64, Expand); in SparcTargetLowering() 1399 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); in SparcTargetLowering() 1400 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); in SparcTargetLowering() 1401 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); in SparcTargetLowering() 1404 setOperationAction(ISD::UREM, MVT::i32, Expand); in SparcTargetLowering() 1405 setOperationAction(ISD::SREM, MVT::i32, Expand); in SparcTargetLowering() [all …]
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/external/ppp/pppd/ |
D | pppcrypt.c | 78 Expand(in, out) in Expand() function 120 Expand(des_key, crypt_key); 135 Expand(clear, des_input); 151 Expand(cipher, des_input);
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/external/srec/tools/thirdparty/OpenFst/fst/lib/ |
D | rmepsilon.h | 67 void Expand(StateId s); 135 void RmEpsilonState<Arc,Queue>::Expand(typename Arc::StateId source) { in Expand() function 247 rmeps_state.Expand(state); in RmEpsilon() 356 Expand(s); in Final() 363 Expand(s); in NumArcs() 369 Expand(s); in NumInputEpsilons() 375 Expand(s); in NumOutputEpsilons() 381 Expand(s); in InitArcIterator() 385 void Expand(StateId s) { in Expand() function 386 rmeps_state_.Expand(s); in Expand() [all …]
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D | arcsort.h | 124 Expand(s); in NumArcs() 130 Expand(s); in NumInputEpsilons() 136 Expand(s); in NumOutputEpsilons() 146 Expand(s); in InitArcIterator() 150 void Expand(StateId s) { in Expand() function 270 fst.impl_->Expand(s); in ArcIterator()
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/external/openfst/src/include/fst/ |
D | rmepsilon.h | 84 void Expand(StateId s); 160 void RmEpsilonState<Arc,Queue>::Expand(typename Arc::StateId source) { in Expand() function 299 rmeps_state.Expand(state); in RmEpsilon() 441 Expand(s); in Final() 448 Expand(s); in NumArcs() 454 Expand(s); in NumInputEpsilons() 460 Expand(s); in NumOutputEpsilons() 476 Expand(s); in InitArcIterator() 480 void Expand(StateId s) { in Expand() function 481 rmeps_state_.Expand(s); in Expand() [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 84 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand); in PPCTargetLowering() 86 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in PPCTargetLowering() 101 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in PPCTargetLowering() 125 setTruncStoreAction(MVT::i64, MVT::i1, Expand); in PPCTargetLowering() 126 setTruncStoreAction(MVT::i32, MVT::i1, Expand); in PPCTargetLowering() 127 setTruncStoreAction(MVT::i16, MVT::i1, Expand); in PPCTargetLowering() 128 setTruncStoreAction(MVT::i8, MVT::i1, Expand); in PPCTargetLowering() 138 setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand); in PPCTargetLowering() 139 setOperationAction(ISD::FCEIL, MVT::ppcf128, Expand); in PPCTargetLowering() 140 setOperationAction(ISD::FTRUNC, MVT::ppcf128, Expand); in PPCTargetLowering() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 66 SDValue Expand(SDValue Op); 220 case TargetLowering::Expand: in LegalizeOp() 326 case TargetLowering::Expand: in LegalizeOp() 327 Result = Expand(Op); in LegalizeOp() 636 SDValue VectorLegalizer::Expand(SDValue Op) { in Expand() function in __anon741ec2090111::VectorLegalizer 684 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand || in ExpandSELECT() 685 TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand || in ExpandSELECT() 686 TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand || in ExpandSELECT() 687 TLI.getOperationAction(ISD::BUILD_VECTOR, VT) == TargetLowering::Expand) in ExpandSELECT() 724 if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Expand || in ExpandSEXTINREG() [all …]
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