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Searched refs:madd (Results 1 – 25 of 83) sorted by relevance

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/external/eigen/Eigen/src/Core/products/
DGeneralBlockPanelKernel.h206 …EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, AccPacket& tmp…
277 …EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, RhsPacket& tmp…
379 …EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, DoublePacket& c, RhsPacket& …
385 …EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, ResPacket& c, RhsPacket& /*t…
482 …EIGEN_STRONG_INLINE void madd(const LhsPacket& a, const RhsPacket& b, AccPacket& c, RhsPacket& tmp…
606 traits.madd(A0,B_0,C0,T0);
607 traits.madd(A1,B_0,C4,B_0);
609 traits.madd(A0,B_0,C1,T0);
610 traits.madd(A1,B_0,C5,B_0);
615 traits.madd(A0,B_0,C0,T0);
[all …]
/external/llvm/test/CodeGen/AArch64/
Dmul-lohi.ll7 ; CHECK-DAG: madd [[PART1:x[0-9]+]], x0, x3, [[CARRY]]
8 ; CHECK: madd x1, x1, x2, [[PART1]]
13 ; CHECK-BE-DAG: madd [[PART1:x[0-9]+]], x1, x2, [[CARRY]]
14 ; CHECK-BE: madd x0, x0, x3, [[PART1]]
Daarch64-fix-cortex-a53-835769.ll33 ; CHECK-NEXT: madd
36 ; CHECK-NOWORKAROUND-NEXT: madd
39 ; CHECK-BASIC-PASS-DISABLED-NEXT: madd
51 ; CHECK-NEXT: madd
54 ; CHECK-NOWORKAROUND-NEXT: madd
312 ; CHECK-NEXT: madd
315 ; CHECK-NOWORKAROUND-NEXT: madd
328 ; CHECK-NEXT: madd
331 ; CHECK-NOWORKAROUND-NEXT: madd
409 ; CHECK-NEXT: madd
[all …]
Ddp-3source.ll7 ; CHECK: madd {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
15 ; CHECK: madd {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
/external/llvm/test/MC/Mips/
Dmicromips-multiply-instructions.s12 # CHECK-EL: madd $4, $5 # encoding: [0xa4,0x00,0x3c,0xcb]
19 # CHECK-EB: madd $4, $5 # encoding: [0x00,0xa4,0xcb,0x3c]
23 madd $4, $5
Dmips-dsp-instructions.s31 # CHECK: madd $ac1, $6, $7 # encoding: [0x70,0xc7,0x08,0x00]
42 # CHECK: madd $6, $7 # encoding: [0x70,0xc7,0x00,0x00]
79 madd $ac1, $6, $7
90 madd $6, $7
Dmicromips-fpu-instructions.s64 # CHECK-EL: madd.s $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x01,0x11]
65 # CHECK-EL: madd.d $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x09,0x11]
127 # CHECK-EB: madd.s $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x01]
128 # CHECK-EB: madd.d $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x09]
186 madd.s $f2, $f4, $f6, $f8
187 madd.d $f2, $f4, $f6, $f8
Dmips64-alu-instructions.s78 # CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
103 madd $6,$7
Dmips-alu-instructions.s82 # CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
107 madd $6,$7
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips32r2.s8madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
9madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
Dinvalid-mips32.s8madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature …
9madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature …
/external/llvm/test/CodeGen/Mips/
Dinlineasm-cnstrnt-reg.ll37 ; CHECK-NEXT: madd ${{[0-9]+}},${{[0-9]+}}
41 …call i32 asm sideeffect "\09mtlo $3 \0A\09\09madd $1,$2 ", "=l,r,r,r"(i32 7, i32 6, i32 44) nounwi…
Dfmadd1.ll1 ; Check that madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are supported
32 ; 32R2: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
47 ; 64R2: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
117 ; 32R2-NAN: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
134 ; 64R2-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
198 ; 32R2: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
214 ; 64R2: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13
285 ; 32R2-NAN: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
303 ; 64R2-NAN: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13
/external/llvm/test/MC/Mips/mips4/
Dinvalid-mips64r2.s18madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
19madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
20madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
Dinvalid-mips64.s15madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
16madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
/external/llvm/test/MC/Mips/mips5/
Dinvalid-mips64.s16madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
17madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
Dinvalid-mips64r2.s22madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
24madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s76 madd $s6,$13
77 madd $zero,$9
78 madd.d $f18,$f19,$f26,$f20
79 madd.s $f1,$f31,$f19,$f25
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips32r2.s21madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
22madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
23madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
24madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
Dinvalid-mips32.s17madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
18madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
/external/llvm/test/CodeGen/Mips/msa/
D3rf_4rf_q.ll17 %3 = tail call <8 x i16> @llvm.mips.madd.q.h(<8 x i16> %0, <8 x i16> %1, <8 x i16> %2)
22 declare <8 x i16> @llvm.mips.madd.q.h(<8 x i16>, <8 x i16>, <8 x i16>) nounwind
42 %3 = tail call <4 x i32> @llvm.mips.madd.q.w(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2)
47 declare <4 x i32> @llvm.mips.madd.q.w(<4 x i32>, <4 x i32>, <4 x i32>) nounwind
/external/libvorbis/
Dconfigure.ac177 CFLAGS="-O3 -Wall -Wextra -ffast-math -mfused-madd -D_REENTRANT"
178 PROFILE="-pg -g -O3 -ffast-math -mfused-madd -D_REENTRANT";;
181 CFLAGS="-O3 -Wall -Wextra -ffast-math -mfused-madd -mcpu=750 -D_REENTRANT"
182 PROFILE="-pg -g -O3 -ffast-math -mfused-madd -mcpu=750 -D_REENTRANT";;
/external/clang/test/SemaCXX/
Dvector-casts.cpp43 void madd(const testvec& rhs) { in madd() function
/external/llvm/test/MC/Mips/mips32/
Dinvalid-mips32r2.s15madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
16madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
/external/llvm/test/CodeGen/X86/
Dcommute-intrinsic.ll7 define <2 x i64> @madd(<2 x i64> %b) nounwind {

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