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Searched refs:reg4 (Results 1 – 25 of 33) sorted by relevance

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/external/linux-tools-perf/perf-3.12.0/arch/arm/lib/
Dmemcpy.S23 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
24 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
27 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
28 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
39 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
40 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
/external/llvm/test/CodeGen/ARM/
Dfast-isel-pic.ll47 ; THUMB-ELF: ldr r[[reg4:[0-9]+]],
48 ; THUMB-ELF: ldr r[[reg3]], [r[[reg3]], r[[reg4]]]
50 ; ARM: ldr [[reg4:r[0-9]+]],
51 ; ARM: ldr [[reg4]], [pc, [[reg4]]]
/external/llvm/test/CodeGen/R600/
Dpv.ll6 …eg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3, <4 x float> inreg %reg4, <4 x float> inreg …
20 %12 = extractelement <4 x float> %reg4, i32 0
21 %13 = extractelement <4 x float> %reg4, i32 1
22 %14 = extractelement <4 x float> %reg4, i32 2
23 %15 = extractelement <4 x float> %reg4, i32 3
Dbig_alu.ll7 …eg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3, <4 x float> inreg %reg4, <4 x float> inreg …
39 %30 = extractelement <4 x float> %reg4, i32 0
40 %31 = extractelement <4 x float> %reg4, i32 1
41 %32 = extractelement <4 x float> %reg4, i32 2
42 %33 = extractelement <4 x float> %reg4, i32 3
/external/vixl/src/a64/
Dmacro-assembler-a64.cc1417 const Register& reg4) { in Include() argument
1418 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Include()
1429 const FPRegister& reg4) { in Include() argument
1430 RegList include = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Include()
1448 const Register& reg4) { in Exclude() argument
1449 RegList exclude = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Exclude()
1457 const FPRegister& reg4) { in Exclude() argument
1458 RegList excludefp = reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit(); in Exclude()
1466 const CPURegister& reg4) { in Exclude() argument
1470 const CPURegister regs[] = {reg1, reg2, reg3, reg4}; in Exclude()
Dmacro-assembler-a64.h1322 const Register& reg4 = NoReg);
1326 const FPRegister& reg4 = NoFPReg);
1336 const Register& reg4 = NoReg);
1340 const FPRegister& reg4 = NoFPReg);
1344 const CPURegister& reg4 = NoCPUReg);
Dassembler-a64.h284 const CPURegister& reg4 = NoReg,
298 const CPURegister& reg4 = NoCPUReg,
311 CPURegister reg4 = NoCPUReg)
312 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()),
314 VIXL_ASSERT(AreSameSizeAndType(reg1, reg2, reg3, reg4));
Dassembler-a64.cc2246 const CPURegister& reg3, const CPURegister& reg4, in AreAliased() argument
2255 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; in AreAliased()
2283 const CPURegister& reg3, const CPURegister& reg4, in AreSameSizeAndType() argument
2290 match &= !reg4.IsValid() || reg4.IsSameSizeAndType(reg1); in AreSameSizeAndType()
/external/pixman/pixman/
Dpixman-android-neon.S93 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2
98 bilinear_load_8888 reg3, reg4, tmp2
100 vmlal.u8 acc2, reg4, d29
Dpixman-arm-neon-asm-bilinear.S109 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2
114 bilinear_load_8888 reg3, reg4, tmp2
116 vmlal.u8 acc2, reg4, d29
130 acc1, acc2, reg1, reg2, reg3, reg4, acc2lo, acc2hi
144 vzip.u8 reg2, reg4
145 vzip.u8 reg3, reg4
150 vmlal.u8 acc2, reg4, d29
Dpixman-arm-neon-asm.h92 .macro pixldst4 op, elem_size, reg1, reg2, reg3, reg4, mem_operand, abits
94 op&.&elem_size {d&reg1, d&reg2, d&reg3, d&reg4}, [&mem_operand&, :&abits&]!
96 op&.&elem_size {d&reg1, d&reg2, d&reg3, d&reg4}, [&mem_operand&]!
Dpixman-arm-neon-asm.S2868 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2
2873 bilinear_load_8888 reg3, reg4, tmp2
2875 vmlal.u8 acc2, reg4, d29
2889 acc1, acc2, reg1, reg2, reg3, reg4, acc2lo, acc2hi
2903 vzip.u8 reg2, reg4
2904 vzip.u8 reg3, reg4
2909 vmlal.u8 acc2, reg4, d29
/external/chromium_org/third_party/skia/gm/
Dglyph_pos.cpp199 static GMRegistry reg4(GlyphPosStrokeFactory);
Dbitmaprect.cpp255 static skiagm::GMRegistry reg4(MyFactory4);
Dgradients.cpp453 static GMRegistry reg4(MyFactory4);
/external/skia/gm/
Dbitmaprect.cpp248 static skiagm::GMRegistry reg4(MyFactory4);
Dgradients.cpp457 static GMRegistry reg4(MyFactory4);
/external/chromium_org/v8/src/arm64/
Dassembler-arm64.h413 Register reg4 = NoReg);
421 const CPURegister& reg4 = NoReg,
434 const CPURegister& reg4 = NoCPUReg,
451 CPURegister reg4 = NoCPUReg)
452 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()),
454 DCHECK(AreSameSizeAndType(reg1, reg2, reg3, reg4));
Dassembler-arm64.cc207 Register reg3, Register reg4) { in GetAllocatableRegisterThatIsNotOneOf() argument
208 CPURegList regs(reg1, reg2, reg3, reg4); in GetAllocatableRegisterThatIsNotOneOf()
220 const CPURegister& reg3, const CPURegister& reg4, in AreAliased() argument
229 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; in AreAliased()
257 const CPURegister& reg3, const CPURegister& reg4, in AreSameSizeAndType() argument
264 match &= !reg4.IsValid() || reg4.IsSameSizeAndType(reg1); in AreSameSizeAndType()
/external/chromium_org/v8/src/arm/
Dmacro-assembler-arm.cc3948 Register reg4, in GetRegisterThatIsNotOneOf() argument
3955 if (reg4.is_valid()) regs |= reg4.bit(); in GetRegisterThatIsNotOneOf()
3999 Register reg4, in AreAliased() argument
4005 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() + in AreAliased()
4012 if (reg4.is_valid()) regs |= reg4.bit(); in AreAliased()
Dmacro-assembler-arm.h51 Register reg4 = no_reg,
60 Register reg4 = no_reg,
/external/libvpx/libvpx/vp9/common/arm/neon/
Dvp9_idct32x32_add_neon.asm241 …BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
279 vqrshrn.s32 $reg4, q10, #14
286 DO_BUTTERFLY_STD $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
287 DO_BUTTERFLY d28, d29, d26, d27, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
/external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/
Dvp9_idct32x32_add_neon.asm241 …BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
279 vqrshrn.s32 $reg4, q10, #14
286 DO_BUTTERFLY_STD $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
287 DO_BUTTERFLY d28, d29, d26, d27, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
/external/chromium_org/v8/src/mips/
Dmacro-assembler-mips.h83 Register reg4 = no_reg,
90 Register reg4 = no_reg,
/external/chromium_org/v8/src/mips64/
Dmacro-assembler-mips64.h89 Register reg4 = no_reg,
96 Register reg4 = no_reg,

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