| /hardware/invensense/60xx/mlsdk/mllite/ |
| D | ml.c | 279 unsigned char regs[4] = { 0 }; in inv_apply_endian_accel() local
290 regs[0] = 0; in inv_apply_endian_accel()
291 regs[1] = 64; in inv_apply_endian_accel()
292 regs[2] = 0; in inv_apply_endian_accel()
293 regs[3] = 0; in inv_apply_endian_accel()
297 regs[0] = 0; in inv_apply_endian_accel()
298 regs[1] = 0; in inv_apply_endian_accel()
299 regs[2] = 64; in inv_apply_endian_accel()
300 regs[3] = 0; in inv_apply_endian_accel()
303 return inv_set_mpu_memory(KEY_D_1_236, 4, regs); in inv_apply_endian_accel()
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| D | mlBiasNoMotion.c | 80 unsigned char regs[3] = { 0x0d, DINA35, 0x5d }; in inv_turn_on_bias_from_no_motion() local
82 result = inv_set_mpu_memory(KEY_CFG_MOTION_BIAS, 3, regs); in inv_turn_on_bias_from_no_motion()
91 unsigned char regs[3] = { DINA90 + 8, DINA90 + 8, DINA90 + 8 }; in inv_turn_off_bias_from_no_motion() local
93 result = inv_set_mpu_memory(KEY_CFG_MOTION_BIAS, 3, regs); in inv_turn_off_bias_from_no_motion()
102 unsigned char regs[12]; in inv_update_bias() local
108 regs[0] = DINAA0 + 3; in inv_update_bias()
109 result = inv_set_mpu_memory(KEY_FCFG_6, 1, regs); in inv_update_bias()
115 result = inv_get_mpu_memory(KEY_D_1_244, 12, regs); in inv_update_bias()
121 inv_convert_bias(regs, bias); in inv_update_bias()
123 regs[0] = DINAA0 + 15; in inv_update_bias()
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| D | mlcontrol.c | 118 unsigned char regs[2]; in inv_set_control_sensitivity() local
129 regs[0] = (unsigned char)(finalSens / 256); in inv_set_control_sensitivity()
130 regs[1] = (unsigned char)(finalSens % 256); in inv_set_control_sensitivity()
133 result = inv_set_mpu_memory(KEY_D_0_224, 2, regs); in inv_set_control_sensitivity()
141 result = inv_set_mpu_memory(KEY_D_0_228, 2, regs); in inv_set_control_sensitivity()
149 result = inv_set_mpu_memory(KEY_D_0_232, 2, regs); in inv_set_control_sensitivity()
157 result = inv_set_mpu_memory(KEY_D_0_236, 2, regs); in inv_set_control_sensitivity()
204 unsigned char regs[8] = { DINA06, DINA26, in inv_set_control_func() local
217 regs[i] = DINA80 + 3; in inv_set_control_func()
220 result = inv_set_mpu_memory(KEY_CFG_4, 8, regs); in inv_set_control_func()
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| D | mlFIFO.c | 226 static inv_error_t inv_construct3_fifo(unsigned char *regs, in inv_construct3_fifo() argument
240 regs[0] = DINAF8 + 2; in inv_construct3_fifo()
247 regs[kk + 1] = DINAA0 + 3; in inv_construct3_fifo()
251 result = inv_set_mpu_memory(key, 4, regs); in inv_construct3_fifo()
262 unsigned char regs = DINA30; in inv_set_footer() local
400 result = inv_set_mpu_memory(KEY_CFG_16, 1, ®s); in inv_set_footer()
410 regs = DINAA0 + 3; in inv_set_footer()
411 result = inv_set_mpu_memory(KEY_CFG_16, 1, ®s); in inv_set_footer()
466 unsigned char regs[4]; in inv_state_change_fifo() local
476 inv_int16_to_big8(delay, regs); in inv_state_change_fifo()
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| D | compass.c | 319 unsigned char regs[] = { in inv_get_compass_data() local
333 ARRAY_SIZE(regs), regs); in inv_get_compass_data()
336 unsigned char regs[] = { in inv_get_compass_data() local
342 ARRAY_SIZE(regs), regs); in inv_get_compass_data()
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| D | mlsupervisor.c | 521 unsigned char regs[4]; in inv_accel_compass_supervisor() local
525 regs[0] = (unsigned char)((accSF >> 24) & 0xff); in inv_accel_compass_supervisor()
526 regs[1] = (unsigned char)((accSF >> 16) & 0xff); in inv_accel_compass_supervisor()
527 regs[2] = (unsigned char)((accSF >> 8) & 0xff); in inv_accel_compass_supervisor()
528 regs[3] = (unsigned char)(accSF & 0xff); in inv_accel_compass_supervisor()
529 result = inv_set_mpu_memory(KEY_D_0_96, 4, regs); in inv_accel_compass_supervisor()
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| D | mlarray.c | 2181 unsigned char regs[6]; in inv_set_accel_bias() local
2201 regs[2 * i + 0] = (unsigned char)(biasTmp / 256); in inv_set_accel_bias()
2202 regs[2 * i + 1] = (unsigned char)(biasTmp % 256); in inv_set_accel_bias()
2204 result = inv_set_mpu_memory(KEY_D_1_8, 2, ®s[0]); in inv_set_accel_bias()
2209 result = inv_set_mpu_memory(KEY_D_1_10, 2, ®s[2]); in inv_set_accel_bias()
2214 result = inv_set_mpu_memory(KEY_D_1_2, 2, ®s[4]); in inv_set_accel_bias()
2285 unsigned char regs[3]; in inv_set_gyro_temp_slope() local
2296 regs[i] = (unsigned char)sf; in inv_set_gyro_temp_slope()
2298 result = inv_set_offsetTC(regs); in inv_set_gyro_temp_slope()
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| D | mldl.c | 685 unsigned char regs[7]; in inv_set_offset() local
695 regs[1 + ii * 2] = (unsigned char)(offset[ii] >> 8) & 0xff; in inv_set_offset()
696 regs[1 + ii * 2 + 1] = (unsigned char)(offset[ii] & 0xff); in inv_set_offset()
700 regs[0] = MPUREG_X_OFFS_USRH; in inv_set_offset()
701 result = inv_serial_write(sMLSLHandle, mldlCfg.addr, 7, regs); in inv_set_offset()
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| D | mlSetGyroBias.h | 43 void inv_convert_bias(const unsigned char *regs, short *bias);
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| D | mlSetGyroBias.c | 52 void inv_convert_bias(const unsigned char *regs, short *bias) in inv_convert_bias() argument
65 biasTmp2[i] = inv_big8_to_int32(®s[i * 4]); in inv_convert_bias()
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| /hardware/intel/img/psb_video/src/ |
| D | psb_overlay.c | 135 struct drm_psb_register_rw_arg regs; in I830UpdateGamma() local
143 memset(®s, 0, sizeof(regs)); in I830UpdateGamma()
145 regs.overlay_write_mask |= OV_REGRWBITS_OGAM_ALL | OVC_REGRWBITS_OGAM_ALL; in I830UpdateGamma()
147 regs.overlay_write_mask |= OV_REGRWBITS_OGAM_ALL; in I830UpdateGamma()
148 regs.overlay.OGAMC0 = gamma0; in I830UpdateGamma()
149 regs.overlay.OGAMC1 = gamma1; in I830UpdateGamma()
150 regs.overlay.OGAMC2 = gamma2; in I830UpdateGamma()
151 regs.overlay.OGAMC3 = gamma3; in I830UpdateGamma()
152 regs.overlay.OGAMC4 = gamma4; in I830UpdateGamma()
153 regs.overlay.OGAMC5 = gamma5; in I830UpdateGamma()
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_ports/ |
| D | x86.h | 82 int regs[4];\
83 __cpuidex(regs, func, func2); \
84 a = regs[0]; b = regs[1]; c = regs[2]; d = regs[3];\
90 int regs[4];\
91 __cpuid(regs, func); \
92 a = regs[0]; b = regs[1]; c = regs[2]; d = regs[3];\
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| /hardware/akm/AK8975_FS/akmdfs/ |
| D | AKFS_APIs.c | 42 const uint8 regs[] in AKFS_Init() argument
46 __FUNCTION__, hpat, regs[0], regs[1], regs[2]); in AKFS_Init()
66 g_prms.mi_asa.u.x = regs[0]; in AKFS_Init()
67 g_prms.mi_asa.u.y = regs[1]; in AKFS_Init()
68 g_prms.mi_asa.u.z = regs[2]; in AKFS_Init()
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| D | AKFS_Measure.c | 37 uint8 regs[3] in AKFS_ReadAK8975FUSEROM()
47 if (AKD_RxData(AK8975_FUSE_ASAX, regs, 3) != AKD_SUCCESS) { in AKFS_ReadAK8975FUSEROM()
59 __FUNCTION__, regs[0], regs[1], regs[2]); in AKFS_ReadAK8975FUSEROM()
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| D | main.c | 201 uint8 regs[3]; in main() local
233 if (AKFS_ReadAK8975FUSEROM(regs) != AKM_SUCCESS) { in main()
239 if (AKFS_Init(pat, regs) != AKM_SUCCESS) { in main()
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| D | AKFS_Measure.h | 45 uint8 regs[3]
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| D | AKFS_APIs.h | 35 const uint8 regs[]
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| /hardware/intel/bootstub/ |
| D | bootstub.c | 205 static inline void cpuid(u32 op, u32 regs[4]) in cpuid()
211 : "=a"(regs[0]), "=D"(regs[1]), "=c"(regs[2]), "=d"(regs[3]) in cpuid()
225 u32 regs[4]; in mid_identify_cpu() local
227 cpuid(1, regs); in mid_identify_cpu()
229 switch ( regs[CR_EAX] & CPUID_MASK ) { in mid_identify_cpu()
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| /hardware/invensense/60xx/mlsdk/mlutils/ |
| D | mputest.c | 330 unsigned char regs[7]; in inv_test_gyro_3050() local
346 regs[0] = 0x03; /* filter = 42Hz, analog_sample rate = 1 KHz */ in inv_test_gyro_3050()
349 regs[0] |= 0x18; in inv_test_gyro_3050()
352 regs[0] |= 0x10; in inv_test_gyro_3050()
355 regs[0] |= 0x08; in inv_test_gyro_3050()
359 regs[0] |= 0x00; in inv_test_gyro_3050()
364 MPUREG_DLPF_FS_SYNC, regs[0]); in inv_test_gyro_3050()
580 unsigned char regs[7]; in inv_test_gyro_6050() local
596 regs[0] = 0x03; /* filter = 42Hz, analog_sample rate = 1 KHz */ in inv_test_gyro_6050()
599 regs[0] |= 0x18; in inv_test_gyro_6050()
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| /hardware/qcom/msm8960/kernel-headers/linux/mfd/ |
| D | msm-adie-codec.h | 67 struct adie_codec_register *regs; member
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| /hardware/qcom/msm8x84/kernel-headers/linux/mfd/ |
| D | msm-adie-codec.h | 67 struct adie_codec_register *regs; member
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| /hardware/qcom/msm8x74/kernel-headers/linux/mfd/ |
| D | msm-adie-codec.h | 67 struct adie_codec_register *regs; member
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| /hardware/qcom/msm8960/original-kernel-headers/linux/mfd/ |
| D | msm-adie-codec.h | 88 struct adie_codec_register *regs; member
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| /hardware/qcom/msm8x74/original-kernel-headers/linux/mfd/ |
| D | msm-adie-codec.h | 88 struct adie_codec_register *regs; member
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| /hardware/qcom/msm8x84/original-kernel-headers/linux/mfd/ |
| D | msm-adie-codec.h | 88 struct adie_codec_register *regs; member
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