Searched defs:setcc (Results 1 – 4 of 4) sorted by relevance
| /art/compiler/utils/arm/ |
| D | assembler_thumb2.cc | 1092 void Thumb2Assembler::EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) { in EmitShift()
1129 void Thumb2Assembler::EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) { in EmitShift()
2156 bool setcc, Condition cond) { in Lsl()
2164 bool setcc, Condition cond) { in Lsr()
2173 bool setcc, Condition cond) { in Asr()
2182 bool setcc, Condition cond) { in Ror()
2189 void Thumb2Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { in Rrx()
2196 bool setcc, Condition cond) { in Lsl()
2203 bool setcc, Condition cond) { in Lsr()
2210 bool setcc, Condition cond) { in Asr()
[all …]
|
| D | assembler_arm32.cc | 1043 bool setcc, Condition cond) { in Lsl()
1054 bool setcc, Condition cond) { in Lsr()
1066 bool setcc, Condition cond) { in Asr()
1078 bool setcc, Condition cond) { in Ror()
1087 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) { in Rrx()
1097 bool setcc, Condition cond) { in Lsl()
1107 bool setcc, Condition cond) { in Lsr()
1117 bool setcc, Condition cond) { in Asr()
1127 bool setcc, Condition cond) { in Ror()
|
| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 493 __ setcc(X86_64Condition(comp->GetCondition()), in VisitCondition() local
|
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 1444 void X86_64Assembler::setcc(Condition condition, CpuRegister dst) { in setcc() function in art::x86_64::X86_64Assembler
|