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Searched refs:RSP (Results 1 – 7 of 7) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_x86_64.cc88 __ addq(CpuRegister(RSP), in EmitNativeCode()
192 blocked_registers[RSP] = true; in SetupBlockedRegisters()
212 __ subq(CpuRegister(RSP), in GenerateFrameEntry()
223 __ gs()->cmpq(CpuRegister(RSP), in GenerateFrameEntry()
228 CpuRegister(RSP), -static_cast<int32_t>(GetStackOverflowReservedBytes(kX86_64)))); in GenerateFrameEntry()
232 __ movl(Address(CpuRegister(RSP), kCurrentMethodStackOffset), CpuRegister(RDI)); in GenerateFrameEntry()
236 __ addq(CpuRegister(RSP), in GenerateFrameExit()
245 __ movl(reg, Address(CpuRegister(RSP), kCurrentMethodStackOffset)); in LoadCurrentMethod()
282 …__ movl(destination.AsX86_64().AsCpuRegister(), Address(CpuRegister(RSP), source.GetStackIndex())); in Move()
285 …__ movq(destination.AsX86_64().AsCpuRegister(), Address(CpuRegister(RSP), source.GetStackIndex())); in Move()
[all …]
/art/compiler/utils/x86_64/
Dassembler_x86_64.cc1461 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant()
1462 addq(CpuRegister(RSP), Immediate(2 * kWordSize)); in LoadDoubleConstant()
1735 subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame()
1742 movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame()
1748 movl(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame()
1754 movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame()
1758 …movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegiste… in BuildFrame()
1762 …movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame()
1765 …movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame()
1781 movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame()
[all …]
Dassembler_x86_64.h175 CHECK_EQ(base.AsRegister(), RSP); in Address()
176 Init(CpuRegister(RSP), disp.Int32Value()); in Address()
186 if (base.AsRegister() == RSP) { in Init()
187 SetSIB(TIMES_1, CpuRegister(RSP), base); in Init()
191 if (base.AsRegister() == RSP) { in Init()
192 SetSIB(TIMES_1, CpuRegister(RSP), base); in Init()
197 if (base.AsRegister() == RSP) { in Init()
198 SetSIB(TIMES_1, CpuRegister(RSP), base); in Init()
206 CHECK_NE(index.AsRegister(), RSP); // Illegal addressing mode. in Address()
207 SetModRM(0, CpuRegister(RSP)); in Address()
[all …]
Dassembler_x86_64_test.cc51 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); in SetUpHelpers()
183 registers.push_back(new x86_64::CpuRegister(x86_64::RSP)); in setcc_test_fn()
201 byte_regs[x86_64::RSP] = "spl"; in setcc_test_fn()
/art/runtime/arch/x86_64/
Dcontext_x86_64.cc36 gprs_[RSP] = &rsp_; in Reset()
38 rsp_ = X86_64Context::kBadGprBase + RSP; in Reset()
132 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - kWordSize; in DoLongJump()
Dregisters_x86_64.h34 RSP = 4, enumerator
Dcontext_x86_64.h39 bool success = SetGPR(RSP, new_sp); in SetSP()